diff --git a/src/amd/common/ac_rgp.c b/src/amd/common/ac_rgp.c
index 7037e4d6fac..a440fdd314a 100644
--- a/src/amd/common/ac_rgp.c
+++ b/src/amd/common/ac_rgp.c
@@ -680,6 +680,39 @@ static void ac_sqtt_fill_sqtt_data(struct sqtt_file_chunk_sqtt_data *chunk, int3
    chunk->size = size;
 }
 
+/* Below values are from from llvm project
+ * llvm/include/llvm/BinaryFormat/ELF.h
+ */
+enum elf_gfxip_level
+{
+   EF_AMDGPU_MACH_AMDGCN_GFX600 = 0x020,
+   EF_AMDGPU_MACH_AMDGCN_GFX700 = 0x022,
+   EF_AMDGPU_MACH_AMDGCN_GFX801 = 0x028,
+   EF_AMDGPU_MACH_AMDGCN_GFX900 = 0x02c,
+   EF_AMDGPU_MACH_AMDGCN_GFX1010 = 0x033,
+   EF_AMDGPU_MACH_AMDGCN_GFX1030 = 0x036,
+};
+
+static enum elf_gfxip_level ac_chip_class_to_elf_gfxip_level(enum chip_class chip_class)
+{
+   switch (chip_class) {
+   case GFX6:
+      return EF_AMDGPU_MACH_AMDGCN_GFX600;
+   case GFX7:
+      return EF_AMDGPU_MACH_AMDGCN_GFX700;
+   case GFX8:
+      return EF_AMDGPU_MACH_AMDGCN_GFX801;
+   case GFX9:
+      return EF_AMDGPU_MACH_AMDGCN_GFX900;
+   case GFX10:
+      return EF_AMDGPU_MACH_AMDGCN_GFX1010;
+   case GFX10_3:
+      return EF_AMDGPU_MACH_AMDGCN_GFX1030;
+   default:
+      unreachable("Invalid chip class");
+   }
+}
+
 static void ac_sqtt_dump_data(struct radeon_info *rad_info,
                               const struct ac_thread_trace *thread_trace,
                               struct ac_thread_trace_data *thread_trace_data,
@@ -723,6 +756,7 @@ static void ac_sqtt_dump_data(struct radeon_info *rad_info,
       struct sqtt_file_chunk_code_object_database code_object;
       struct sqtt_code_object_database_record code_object_record;
       uint32_t elf_size_calc = 0;
+      uint flags = ac_chip_class_to_elf_gfxip_level(rad_info->chip_class);
 
       fseek(output, sizeof(struct sqtt_file_chunk_code_object_database), SEEK_CUR);
       file_offset += sizeof(struct sqtt_file_chunk_code_object_database);
@@ -731,7 +765,7 @@ static void ac_sqtt_dump_data(struct radeon_info *rad_info,
          fseek(output, sizeof(struct sqtt_code_object_database_record), SEEK_CUR);
          ac_rgp_file_write_elf_object(output, file_offset +
                                       sizeof(struct sqtt_code_object_database_record),
-                                      record, &elf_size_calc);
+                                      record, &elf_size_calc, flags);
          code_object_record.size = elf_size_calc;
          fseek(output, file_offset, SEEK_SET);
          fwrite(&code_object_record, sizeof(struct sqtt_code_object_database_record),
diff --git a/src/amd/common/ac_rgp.h b/src/amd/common/ac_rgp.h
index 0aa0fd5ef33..2ddcd82eb38 100644
--- a/src/amd/common/ac_rgp.h
+++ b/src/amd/common/ac_rgp.h
@@ -108,6 +108,6 @@ struct rgp_pso_correlation {
 void
 ac_rgp_file_write_elf_object(FILE *output, size_t file_elf_start,
                              struct rgp_code_object_record *record,
-                             uint32_t *written_size);
+                             uint32_t *written_size, uint flags);
 
 #endif
diff --git a/src/amd/common/ac_rgp_elf_object_pack.c b/src/amd/common/ac_rgp_elf_object_pack.c
index 8a788ce6713..3d8c6205009 100644
--- a/src/amd/common/ac_rgp_elf_object_pack.c
+++ b/src/amd/common/ac_rgp_elf_object_pack.c
@@ -342,7 +342,6 @@ ac_rgp_file_write_elf_symbol_table(FILE *output, uint32_t *elf_size_calc,
  * llvm/includel/llvm/BinaryFormat/ELF.h
  */
 #define ELFOSABI_AMDGPU_PAL 65
-#define EF_AMDGPU_MACH_AMDGCN_GFX902 0x02d
 #define NT_AMDGPU_METADATA 32
 
 uint8_t elf_ident[EI_NIDENT] = { ELFMAG0, ELFMAG1, ELFMAG2, ELFMAG3,
@@ -360,7 +359,7 @@ struct ac_rgp_elf_note_msgpack_hdr {
 void
 ac_rgp_file_write_elf_object(FILE *output, size_t file_elf_start,
                              struct rgp_code_object_record *record,
-                             uint32_t *written_size)
+                             uint32_t *written_size, uint flags)
 {
    Elf64_Ehdr elf_hdr;
    Elf64_Shdr sec_hdr[5];
@@ -383,7 +382,7 @@ ac_rgp_file_write_elf_object(FILE *output, size_t file_elf_start,
    elf_hdr.e_machine = EM_AMDGPU;
    elf_hdr.e_version = EV_CURRENT;
    elf_hdr.e_entry = 0;
-   elf_hdr.e_flags = EF_AMDGPU_MACH_AMDGCN_GFX902;
+   elf_hdr.e_flags = flags;
    elf_hdr.e_shstrndx = 1; /* string table entry is hardcoded to 1*/
    elf_hdr.e_phoff = 0;
    elf_hdr.e_shentsize = sizeof(Elf64_Shdr);