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radeonsi: Rename r600->si for functions in si_pipe.h.

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Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Andreas Hartmetz 2014-01-07 02:40:22 +01:00 • committed by Marek Olšák
parent 280c360c02
commit 45578def71
12 changed files with 57 additions and 57 deletions
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18
src/gallium/drivers/radeonsi/si_blit.c
View file

@ -108,12 +108,12 @@ static unsigned u_max_sample(struct pipe_resource *r)
return r->nr_samples ? r->nr_samples - 1 : 0;
}
static void r600_blit_decompress_depth(struct pipe_context *ctx,
struct r600_texture *texture,
struct r600_texture *staging,
unsigned first_level, unsigned last_level,
unsigned first_layer, unsigned last_layer,
unsigned first_sample, unsigned last_sample)
static void si_blit_decompress_depth(struct pipe_context *ctx,
struct r600_texture *texture,
struct r600_texture *staging,
unsigned first_level, unsigned last_level,
unsigned first_layer, unsigned last_layer,
unsigned first_sample, unsigned last_sample)
{
struct si_context *rctx = (struct si_context *)ctx;
unsigned layer, level, sample, checked_last_layer, max_layer, max_sample;
@ -299,8 +299,8 @@ static void r600_blit_decompress_color(struct pipe_context *ctx,
}
}
void r600_decompress_color_textures(struct si_context *rctx,
struct si_textures_info *textures)
void si_decompress_color_textures(struct si_context *rctx,
struct si_textures_info *textures)
{
unsigned i;
unsigned mask = textures->compressed_colortex_mask;
@ -700,5 +700,5 @@ void si_init_blit_functions(struct si_context *rctx)
rctx->b.b.resource_copy_region = r600_resource_copy_region;
rctx->b.b.blit = si_blit;
rctx->b.b.flush_resource = si_flush_resource;
rctx->b.blit_decompress_depth = r600_blit_decompress_depth;
rctx->b.blit_decompress_depth = si_blit_decompress_depth;
}

4
src/gallium/drivers/radeonsi/si_buffer.c
View file

@ -35,8 +35,8 @@
#include "si.h"
#include "si_pipe.h"
void r600_upload_index_buffer(struct si_context *rctx,
struct pipe_index_buffer *ib, unsigned count)
void si_upload_index_buffer(struct si_context *rctx,
struct pipe_index_buffer *ib, unsigned count)
{
u_upload_data(rctx->b.uploader, 0, count * ib->index_size,
ib->user_buffer, &ib->offset, &ib->buffer);

2
src/gallium/drivers/radeonsi/si_hw_context.c
View file

@ -169,7 +169,7 @@ void si_need_cs_space(struct si_context *ctx, unsigned num_dw,
/* Flush if there's not enough space. */
if (num_dw > RADEON_MAX_CMDBUF_DWORDS) {
radeonsi_flush(&ctx->b.b, NULL, RADEON_FLUSH_ASYNC);
si_flush(&ctx->b.b, NULL, RADEON_FLUSH_ASYNC);
}
}

22
src/gallium/drivers/radeonsi/si_pipe.c
View file

@ -54,8 +54,8 @@
/*
* pipe_context
*/
void radeonsi_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
unsigned flags)
void si_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
unsigned flags)
{
struct si_context *rctx = (struct si_context *)ctx;
struct pipe_query *render_cond = NULL;
@ -86,13 +86,13 @@ static void r600_flush_from_st(struct pipe_context *ctx,
struct pipe_fence_handle **fence,
unsigned flags)
{
radeonsi_flush(ctx, fence,
flags & PIPE_FLUSH_END_OF_FRAME ? RADEON_FLUSH_END_OF_FRAME : 0);
si_flush(ctx, fence,
flags & PIPE_FLUSH_END_OF_FRAME ? RADEON_FLUSH_END_OF_FRAME : 0);
}
static void r600_flush_from_winsys(void *ctx, unsigned flags)
{
radeonsi_flush((struct pipe_context*)ctx, NULL, flags);
si_flush((struct pipe_context*)ctx, NULL, flags);
}
static void r600_destroy_context(struct pipe_context *context)
@ -144,13 +144,13 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
rctx->screen = rscreen;
si_init_blit_functions(rctx);
r600_init_query_functions(rctx);
r600_init_context_resource_functions(rctx);
si_init_query_functions(rctx);
si_init_context_resource_functions(rctx);
si_init_compute_functions(rctx);
if (rscreen->b.info.has_uvd) {
rctx->b.b.create_video_codec = radeonsi_uvd_create_decoder;
rctx->b.b.create_video_buffer = radeonsi_video_buffer_create;
rctx->b.b.create_video_codec = si_uvd_create_decoder;
rctx->b.b.create_video_buffer = si_video_buffer_create;
} else {
rctx->b.b.create_video_codec = vl_create_decoder;
rctx->b.b.create_video_buffer = vl_video_buffer_create;
@ -229,7 +229,7 @@ static const char* r600_get_vendor(struct pipe_screen* pscreen)
return "X.Org";
}
const char *r600_get_llvm_processor_name(enum radeon_family family)
const char *si_get_llvm_processor_name(enum radeon_family family)
{
switch (family) {
case CHIP_TAHITI: return "tahiti";
@ -514,7 +514,7 @@ static int r600_get_compute_param(struct pipe_screen *screen,
//TODO: select these params by asic
switch (param) {
case PIPE_COMPUTE_CAP_IR_TARGET: {
const char *gpu = r600_get_llvm_processor_name(rscreen->b.family);
const char *gpu = si_get_llvm_processor_name(rscreen->b.family);
if (ret) {
sprintf(ret, "%s-r600--", gpu);
}

38
src/gallium/drivers/radeonsi/si_pipe.h
View file

@ -179,43 +179,43 @@ struct si_context {
void si_init_blit_functions(struct si_context *rctx);
void si_flush_depth_textures(struct si_context *rctx,
struct si_textures_info *textures);
void r600_decompress_color_textures(struct si_context *rctx,
struct si_textures_info *textures);
void si_decompress_color_textures(struct si_context *rctx,
struct si_textures_info *textures);
/* si_buffer.c */
void r600_upload_index_buffer(struct si_context *rctx,
struct pipe_index_buffer *ib, unsigned count);
void si_upload_index_buffer(struct si_context *rctx,
struct pipe_index_buffer *ib, unsigned count);
/* si_pipe.c */
void radeonsi_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
unsigned flags);
const char *r600_get_llvm_processor_name(enum radeon_family family);
void si_flush(struct pipe_context *ctx, struct pipe_fence_handle **fence,
unsigned flags);
const char *si_get_llvm_processor_name(enum radeon_family family);
/* si_query.c */
void r600_init_query_functions(struct si_context *rctx);
void si_init_query_functions(struct si_context *rctx);
/* si_resource.c */
void r600_init_context_resource_functions(struct si_context *r600);
void si_init_context_resource_functions(struct si_context *r600);
/* si_translate.c */
void r600_translate_index_buffer(struct si_context *r600,
struct pipe_index_buffer *ib,
unsigned count);
void si_translate_index_buffer(struct si_context *r600,
struct pipe_index_buffer *ib,
unsigned count);
#if R600_TRACE_CS
void r600_trace_emit(struct si_context *rctx);
void si_trace_emit(struct si_context *rctx);
#endif
/* si_compute.c */
void si_init_compute_functions(struct si_context *rctx);
/* si_uvd.c */
struct pipe_video_codec *radeonsi_uvd_create_decoder(struct pipe_context *context,
const struct pipe_video_codec *templ);
struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
const struct pipe_video_codec *templ);
struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe,
const struct pipe_video_buffer *tmpl);
struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
const struct pipe_video_buffer *tmpl);
/*
* common helpers
@ -244,7 +244,7 @@ static INLINE unsigned si_map_swizzle(unsigned swizzle)
}
}
static inline unsigned r600_tex_aniso_filter(unsigned filter)
static inline unsigned si_tex_aniso_filter(unsigned filter)
{
if (filter <= 1) return 0;
if (filter <= 2) return 1;
@ -254,7 +254,7 @@ static inline unsigned r600_tex_aniso_filter(unsigned filter)
}
/* 12.4 fixed-point */
static INLINE unsigned r600_pack_float_12p4(float x)
static INLINE unsigned si_pack_float_12p4(float x)
{
return x <= 0 ? 0 :
x >= 4096 ? 0xffff : x * 16;

2
src/gallium/drivers/radeonsi/si_query.c
View file

@ -134,7 +134,7 @@ static void r600_render_condition(struct pipe_context *ctx,
}
}
void r600_init_query_functions(struct si_context *rctx)
void si_init_query_functions(struct si_context *rctx)
{
rctx->b.b.create_query = r600_create_query;
rctx->b.b.destroy_query = r600_destroy_query;

2
src/gallium/drivers/radeonsi/si_resource.c
View file

@ -52,7 +52,7 @@ void si_init_screen_resource_functions(struct pipe_screen *screen)
screen->resource_destroy = u_resource_destroy_vtbl;
}
void r600_init_context_resource_functions(struct si_context *r600)
void si_init_context_resource_functions(struct si_context *r600)
{
r600->b.b.transfer_map = u_transfer_map_vtbl;
r600->b.b.transfer_flush_region = u_default_transfer_flush_region;

2
src/gallium/drivers/radeonsi/si_shader.c
View file

@ -1899,7 +1899,7 @@ int si_compile_llvm(struct si_context *rctx, struct si_pipe_shader *shader,
shader->selector ? shader->selector->tokens : NULL);
memset(&binary, 0, sizeof(binary));
radeon_llvm_compile(mod, &binary,
r600_get_llvm_processor_name(rctx->screen->b.family), dump);
si_get_llvm_processor_name(rctx->screen->b.family), dump);
if (dump && ! binary.disassembled) {
fprintf(stderr, "SI CODE:\n");
for (i = 0; i < binary.code_size; i+=4 ) {

4
src/gallium/drivers/radeonsi/si_state.c
View file

@ -610,8 +610,8 @@ static void *si_create_rs_state(struct pipe_context *ctx,
}
/* Divide by two, because 0.5 = 1 pixel. */
si_pm4_set_reg(pm4, R_028A04_PA_SU_POINT_MINMAX,
S_028A04_MIN_SIZE(r600_pack_float_12p4(psize_min/2)) |
S_028A04_MAX_SIZE(r600_pack_float_12p4(psize_max/2)));
S_028A04_MIN_SIZE(si_pack_float_12p4(psize_min/2)) |
S_028A04_MAX_SIZE(si_pack_float_12p4(psize_max/2)));
tmp = (unsigned)state->line_width * 8;
si_pm4_set_reg(pm4, R_028A08_PA_SU_LINE_CNTL, S_028A08_WIDTH(tmp));

6
src/gallium/drivers/radeonsi/si_state_draw.c
View file

@ -434,7 +434,7 @@ static void si_update_derived_state(struct si_context *rctx)
si_flush_depth_textures(rctx, &rctx->samplers[i]);
}
if (rctx->samplers[i].compressed_colortex_mask) {
r600_decompress_color_textures(rctx, &rctx->samplers[i]);
si_decompress_color_textures(rctx, &rctx->samplers[i]);
}
}
}
@ -717,10 +717,10 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
ib.offset = rctx->index_buffer.offset + info->start * ib.index_size;
/* Translate or upload, if needed. */
r600_translate_index_buffer(rctx, &ib, info->count);
si_translate_index_buffer(rctx, &ib, info->count);
if (ib.user_buffer && !ib.buffer) {
r600_upload_index_buffer(rctx, &ib, info->count);
si_upload_index_buffer(rctx, &ib, info->count);
}
}

6
src/gallium/drivers/radeonsi/si_translate.c
View file

@ -28,9 +28,9 @@
#include "si_pipe.h"
void r600_translate_index_buffer(struct si_context *r600,
struct pipe_index_buffer *ib,
unsigned count)
void si_translate_index_buffer(struct si_context *r600,
struct pipe_index_buffer *ib,
unsigned count)
{
struct pipe_resource *out_buffer = NULL;
unsigned out_offset;

8
src/gallium/drivers/radeonsi/si_uvd.c
View file

@ -51,8 +51,8 @@
/**
* creates an video buffer with an UVD compatible memory layout
*/
struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe,
const struct pipe_video_buffer *tmpl)
struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
const struct pipe_video_buffer *tmpl)
{
struct si_context *ctx = (struct si_context *)pipe;
struct r600_texture *resources[VL_NUM_COMPONENTS] = {};
@ -146,8 +146,8 @@ static struct radeon_winsys_cs_handle* radeonsi_uvd_set_dtb(struct ruvd_msg *msg
/**
* creates an UVD compatible decoder
*/
struct pipe_video_codec *radeonsi_uvd_create_decoder(struct pipe_context *context,
const struct pipe_video_codec *templ)
struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
const struct pipe_video_codec *templ)
{
return ruvd_create_decoder(context, templ, radeonsi_uvd_set_dtb);
}