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nv50: add craziness for non-constant TXB and TXL
If lod or bias can be non-constant across a quad of fragments, we need to execute TEX separately for each value. Don't ask why.
This commit is contained in:
Christoph Bumiller
parent
b91503f457
commit
44d8c9add2
1 changed files with 204 additions and 44 deletions
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@ -660,7 +660,7 @@ emit_mov(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src)
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if (src->type == P_IMMD || src->type == P_CONST) {
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set_long(pc, e);
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set_data(pc, src, 0x7f, 9, e);
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e->inst[1] |= 0x20000000; /* src0 const? */
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e->inst[1] |= 0x20000000; /* mov from c[] */
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} else {
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if (src->type == P_ATTR) {
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set_long(pc, e);
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@ -675,9 +675,9 @@ emit_mov(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src)
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if (is_long(e) && !is_immd(e)) {
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e->inst[1] |= 0x04000000; /* 32-bit */
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e->inst[1] |= 0x0000c000; /* "subsubop" 0x3 */
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e->inst[1] |= 0x0000c000; /* 32-bit c[] load / lane mask 0:1 */
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if (!(e->inst[1] & 0x20000000))
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e->inst[1] |= 0x00030000; /* "subsubop" 0xf */
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e->inst[1] |= 0x00030000; /* lane mask 2:3 */
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} else
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e->inst[0] |= 0x00008000;
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@ -692,6 +692,17 @@ emit_mov_immdval(struct nv50_pc *pc, struct nv50_reg *dst, float f)
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FREE(imm);
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}
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static void
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emit_nop(struct nv50_pc *pc)
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{
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struct nv50_program_exec *e = exec(pc);
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e->inst[0] = 0xf0000000;
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set_long(pc, e);
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e->inst[1] = 0xe0000000;
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emit(pc, e);
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}
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static boolean
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check_swap_src_0_1(struct nv50_pc *pc,
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struct nv50_reg **s0, struct nv50_reg **s1)
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@ -810,6 +821,33 @@ set_src_2(struct nv50_pc *pc, struct nv50_reg *src, struct nv50_program_exec *e)
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e->inst[1] |= ((src->hw & 127) << 14);
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}
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static void
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emit_mov_from_pred(struct nv50_pc *pc, struct nv50_reg *dst, int pred)
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{
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struct nv50_program_exec *e = exec(pc);
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assert(dst->type == P_TEMP);
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e->inst[1] = 0x20000000 | (pred << 12);
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set_long(pc, e);
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set_dst(pc, dst, e);
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emit(pc, e);
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}
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static void
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emit_mov_to_pred(struct nv50_pc *pc, int pred, struct nv50_reg *src)
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{
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struct nv50_program_exec *e = exec(pc);
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e->inst[0] = 0x000001fc;
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e->inst[1] = 0xa0000008;
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set_long(pc, e);
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set_pred_wr(pc, 1, pred, e);
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set_src_0_restricted(pc, src, e);
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emit(pc, e);
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}
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static void
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emit_mul(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src0,
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struct nv50_reg *src1)
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@ -1271,6 +1309,65 @@ emit_kil(struct nv50_pc *pc, struct nv50_reg *src)
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emit(pc, e);
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}
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static struct nv50_program_exec *
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emit_branch(struct nv50_pc *pc, int pred, unsigned cc,
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struct nv50_program_exec **join)
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{
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struct nv50_program_exec *e = exec(pc);
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if (join) {
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set_long(pc, e);
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e->inst[0] |= 0xa0000002;
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emit(pc, e);
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*join = e;
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e = exec(pc);
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}
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set_long(pc, e);
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e->inst[0] |= 0x10000002;
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if (pred >= 0)
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set_pred(pc, cc, pred, e);
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emit(pc, e);
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return pc->p->exec_tail;
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}
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#define QOP_ADD 0
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#define QOP_SUBR 1
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#define QOP_SUB 2
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#define QOP_MOV_SRC1 3
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/* For a quad of threads / top left, top right, bottom left, bottom right
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* pixels, do a different operation, and take src0 from a specific thread.
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*/
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static void
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emit_quadop(struct nv50_pc *pc, struct nv50_reg *dst, int wp, int lane_src0,
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struct nv50_reg *src0, struct nv50_reg *src1, ubyte qop)
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{
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struct nv50_program_exec *e = exec(pc);
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e->inst[0] = 0xc0000000;
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e->inst[1] = 0x80000000;
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set_long(pc, e);
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e->inst[0] |= lane_src0 << 16;
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set_src_0(pc, src0, e);
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set_src_2(pc, src1, e);
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if (wp >= 0)
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set_pred_wr(pc, 1, wp, e);
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if (dst)
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set_dst(pc, dst, e);
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else {
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e->inst[0] |= 0x000001fc;
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e->inst[1] |= 0x00000008;
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}
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e->inst[0] |= (qop & 3) << 20;
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e->inst[1] |= (qop >> 2) << 22;
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emit(pc, e);
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}
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static void
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load_cube_tex_coords(struct nv50_pc *pc, struct nv50_reg *t[4],
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struct nv50_reg **src, unsigned arg, boolean proj)
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@ -1365,6 +1462,94 @@ get_tex_dim(unsigned type, unsigned *dim, unsigned *arg)
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}
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}
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/* We shouldn't execute TEXLOD if any of the pixels in a quad have
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* different LOD values, so branch off groups of equal LOD.
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*/
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static void
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emit_texlod_sequence(struct nv50_pc *pc, struct nv50_reg *tlod,
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struct nv50_reg *src, struct nv50_program_exec *tex)
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{
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struct nv50_program_exec *join_at;
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unsigned i, target = pc->p->exec_size + 7 * 2;
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/* Subtract lod of each pixel from lod of top left pixel, jump
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* texlod insn if result is 0, then repeat for 2 other pixels.
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*/
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emit_quadop(pc, NULL, 0, 0, tlod, tlod, 0x55);
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emit_branch(pc, 0, 2, &join_at)->param.index = target;
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for (i = 1; i < 4; ++i) {
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emit_quadop(pc, NULL, 0, i, tlod, tlod, 0x55);
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emit_branch(pc, 0, 2, NULL)->param.index = target;
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}
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emit_mov(pc, tlod, src); /* target */
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emit(pc, tex); /* texlod */
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join_at->param.index = target + 2 * 2;
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emit_nop(pc);
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pc->p->exec_tail->inst[1] |= 2; /* join _after_ tex */
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}
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static void
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emit_texbias_sequence(struct nv50_pc *pc, struct nv50_reg *t[4], unsigned arg,
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struct nv50_program_exec *tex)
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{
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struct nv50_program_exec *e;
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struct nv50_reg imm_1248, *t123[4][4], *r_bits = alloc_temp(pc, NULL);
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int r_pred = 0;
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unsigned n, c, i, cc[4] = { 0x0a, 0x13, 0x11, 0x10 };
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pc->allow32 = FALSE;
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ctor_reg(&imm_1248, P_IMMD, -1, ctor_immd_4u32(pc, 1, 2, 4, 8) * 4);
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/* Subtract bias value of thread i from bias values of each thread,
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* store result in r_pred, and set bit i in r_bits if result was 0.
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*/
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assert(arg < 4);
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for (i = 0; i < 4; ++i, ++imm_1248.hw) {
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emit_quadop(pc, NULL, r_pred, i, t[arg], t[arg], 0x55);
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emit_mov(pc, r_bits, &imm_1248);
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set_pred(pc, 2, r_pred, pc->p->exec_tail);
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}
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emit_mov_to_pred(pc, r_pred, r_bits);
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/* The lanes of a quad are now grouped by the bit in r_pred they have
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* set. Put the input values for TEX into a new register set for each
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* group and execute TEX only for a specific group.
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* We cannot use the same register set for each group because we need
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* the derivatives, which are implicitly calculated, to be correct.
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*/
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for (i = 1; i < 4; ++i) {
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alloc_temp4(pc, t123[i], 0);
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for (c = 0; c <= arg; ++c)
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emit_mov(pc, t123[i][c], t[c]);
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*(e = exec(pc)) = *(tex);
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e->inst[0] &= ~0x01fc;
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set_dst(pc, t123[i][0], e);
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set_pred(pc, cc[i], r_pred, e);
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emit(pc, e);
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}
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/* finally TEX on the original regs (where we kept the input) */
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set_pred(pc, cc[0], r_pred, tex);
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emit(pc, tex);
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/* put the 3 * n other results into regs for lane 0 */
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n = popcnt4(((e->inst[0] >> 25) & 0x3) | ((e->inst[1] >> 12) & 0xc));
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for (i = 1; i < 4; ++i) {
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for (c = 0; c < n; ++c) {
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emit_mov(pc, t[c], t123[i][c]);
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set_pred(pc, cc[i], r_pred, pc->p->exec_tail);
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}
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free_temp4(pc, t123[i]);
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}
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emit_nop(pc);
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free_temp(pc, r_bits);
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}
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static void
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emit_tex(struct nv50_pc *pc, struct nv50_reg **dst, unsigned mask,
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struct nv50_reg **src, unsigned unit, unsigned type,
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@ -1403,18 +1588,25 @@ emit_tex(struct nv50_pc *pc, struct nv50_reg **dst, unsigned mask,
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emit_mov(pc, t[dim], src[2]);
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}
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if (bias_lod) {
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assert(arg < 4);
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emit_mov(pc, t[arg++], src[3]);
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e->inst[1] |= (bias_lod < 0) ? 0x20000000 : 0x40000000;
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}
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e->inst[0] |= (arg - 1) << 22;
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e->inst[0] |= (mask & 0x3) << 25;
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e->inst[1] |= (mask & 0xc) << 12;
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emit(pc, e);
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if (!bias_lod) {
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e->inst[0] |= (arg - 1) << 22;
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emit(pc, e);
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} else
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if (bias_lod < 0) {
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e->inst[0] |= arg << 22;
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e->inst[1] |= 0x20000000; /* texbias */
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emit_mov(pc, t[arg], src[3]);
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emit_texbias_sequence(pc, t, arg, e);
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} else {
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e->inst[0] |= arg << 22;
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e->inst[1] |= 0x40000000; /* texlod */
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emit_mov(pc, t[arg], src[3]);
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emit_texlod_sequence(pc, t[arg], src[3], e);
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}
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#if 1
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c = 0;
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if (mask & 1) emit_mov(pc, dst[0], t[c++]);
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@ -1436,38 +1628,6 @@ emit_tex(struct nv50_pc *pc, struct nv50_reg **dst, unsigned mask,
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#endif
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}
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static void
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emit_branch(struct nv50_pc *pc, int pred, unsigned cc,
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struct nv50_program_exec **join)
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{
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struct nv50_program_exec *e = exec(pc);
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if (join) {
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set_long(pc, e);
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e->inst[0] |= 0xa0000002;
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emit(pc, e);
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*join = e;
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e = exec(pc);
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}
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set_long(pc, e);
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e->inst[0] |= 0x10000002;
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if (pred >= 0)
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set_pred(pc, cc, pred, e);
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emit(pc, e);
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}
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static void
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emit_nop(struct nv50_pc *pc)
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{
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struct nv50_program_exec *e = exec(pc);
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e->inst[0] = 0xf0000000;
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set_long(pc, e);
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e->inst[1] = 0xe0000000;
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emit(pc, e);
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}
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static void
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emit_ddx(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *src)
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{
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