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gallium/radeon/winsyses: reduce the number of pb_cache buckets

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Small buffers are now handled via the slabs code, so separate buckets in
pb_cache have become redundant.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Nicolai Hähnle 2016-09-12 16:27:41 +02:00
parent fb827c055c
commit 4421c0fb0d
3 changed files with 5 additions and 9 deletions
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2
src/gallium/auxiliary/pipebuffer/pb_cache.h
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@ -50,7 +50,7 @@ struct pb_cache
/* The cache is divided into buckets for minimizing cache misses.
* The driver controls which buffer goes into which bucket.
*/
struct list_head buckets[8];
struct list_head buckets[4];
pipe_mutex mutex;
uint64_t cache_size;

6
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c
View file

@ -741,12 +741,10 @@ no_slab:
/* Determine the pb_cache bucket for minimizing pb_cache misses. */
pb_cache_bucket = 0;
if (size <= 4096) /* small buffers */
pb_cache_bucket += 1;
if (domain & RADEON_DOMAIN_VRAM) /* VRAM or VRAM+GTT */
pb_cache_bucket += 2;
pb_cache_bucket += 1;
if (flags == RADEON_FLAG_GTT_WC) /* WC */
pb_cache_bucket += 4;
pb_cache_bucket += 2;
assert(pb_cache_bucket < ARRAY_SIZE(ws->bo_cache.buckets));
/* Get a buffer from the cache. */

6
src/gallium/winsys/radeon/drm/radeon_drm_bo.c
View file

@ -1014,12 +1014,10 @@ no_slab:
/* Determine the pb_cache bucket for minimizing pb_cache misses. */
pb_cache_bucket = 0;
if (size <= 4096) /* small buffers */
pb_cache_bucket += 1;
if (domain & RADEON_DOMAIN_VRAM) /* VRAM or VRAM+GTT */
pb_cache_bucket += 2;
pb_cache_bucket += 1;
if (flags == RADEON_FLAG_GTT_WC) /* WC */
pb_cache_bucket += 4;
pb_cache_bucket += 2;
assert(pb_cache_bucket < ARRAY_SIZE(ws->bo_cache.buckets));
bo = radeon_bo(pb_cache_reclaim_buffer(&ws->bo_cache, size, alignment,