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i965/gs: Add GS_OPCODE_THREAD_END.

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Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
This commit is contained in:
Paul Berry 2013-03-23 07:42:32 -07:00
parent 96eb2f3536
commit 4416cb7992
5 changed files with 32 additions and 0 deletions
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9
src/mesa/drivers/dri/i965/brw_defines.h
View file

@ -808,6 +808,15 @@ enum opcode {
* "Slot {0,1} Offset" fields in the message header.
*/
GS_OPCODE_URB_WRITE,
/**
* Terminate the geometry shader thread by doing an empty URB write.
*
* This opcode doesn't do an implied move from R0 to the first MRF. This
* allows the geometry shader to override the "GS Number of Output Vertices
* for Slot {0,1}" fields in the message header.
*/
GS_OPCODE_THREAD_END,
};
#define BRW_PREDICATE_NONE 0

2
src/mesa/drivers/dri/i965/brw_shader.cpp
View file

@ -499,6 +499,8 @@ brw_instruction_name(enum opcode op)
case GS_OPCODE_URB_WRITE:
return "gs_urb_write";
case GS_OPCODE_THREAD_END:
return "gs_thread_end";
default:
/* Yes, this leaks. It's in debug code, it should never occur, and if

1
src/mesa/drivers/dri/i965/brw_vec4.cpp
View file

@ -260,6 +260,7 @@ vec4_visitor::implied_mrf_writes(vec4_instruction *inst)
case VS_OPCODE_SCRATCH_WRITE:
return 3;
case GS_OPCODE_URB_WRITE:
case GS_OPCODE_THREAD_END:
return 0;
case SHADER_OPCODE_SHADER_TIME_ADD:
return 0;

1
src/mesa/drivers/dri/i965/brw_vec4.h
View file

@ -629,6 +629,7 @@ private:
void generate_vs_urb_write(vec4_instruction *inst);
void generate_gs_urb_write(vec4_instruction *inst);
void generate_gs_thread_end(vec4_instruction *inst);
void generate_oword_dual_block_offsets(struct brw_reg m1,
struct brw_reg index);
void generate_scratch_write(vec4_instruction *inst,

19
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
View file

@ -427,6 +427,21 @@ vec4_generator::generate_gs_urb_write(vec4_instruction *inst)
BRW_URB_SWIZZLE_INTERLEAVE);
}
void
vec4_generator::generate_gs_thread_end(vec4_instruction *inst)
{
struct brw_reg src = brw_message_reg(inst->base_mrf);
brw_urb_WRITE(p,
brw_null_reg(), /* dest */
inst->base_mrf, /* starting mrf reg nr */
src,
BRW_URB_WRITE_EOT,
1, /* message len */
0, /* response len */
0, /* urb destination offset */
BRW_URB_SWIZZLE_INTERLEAVE);
}
void
vec4_generator::generate_oword_dual_block_offsets(struct brw_reg m1,
struct brw_reg index)
@ -899,6 +914,10 @@ vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
generate_gs_urb_write(inst);
break;
case GS_OPCODE_THREAD_END:
generate_gs_thread_end(inst);
break;
case SHADER_OPCODE_SHADER_TIME_ADD:
brw_shader_time_add(p, src[0], SURF_INDEX_VS_SHADER_TIME);
mark_surface_used(SURF_INDEX_VS_SHADER_TIME);