From 438dcf6d0f5cb8d9506c302dbd6fb12f8cdcee47 Mon Sep 17 00:00:00 2001
From: Qiang Yu <yuq825@gmail.com>
Date: Tue, 16 May 2023 16:48:38 +0800
Subject: [PATCH] aco/assembler: handle ds_(add|sub)_gs_reg_rtn encoding

They are different than normal DS instructions, only
use DATA[0], not use ADDR.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23094>
---
 src/amd/compiler/aco_assembler.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/amd/compiler/aco_assembler.cpp b/src/amd/compiler/aco_assembler.cpp
index ee1d0785aec..c3be64f0c0c 100644
--- a/src/amd/compiler/aco_assembler.cpp
+++ b/src/amd/compiler/aco_assembler.cpp
@@ -473,7 +473,8 @@ emit_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction* inst
          encoding |= reg(ctx, instr->operands[2], 8) << 16;
       if (instr->operands.size() >= 2 && instr->operands[1].physReg() != m0)
          encoding |= reg(ctx, instr->operands[1], 8) << 8;
-      encoding |= reg(ctx, instr->operands[0], 8);
+      if (!instr->operands[0].isUndefined())
+         encoding |= reg(ctx, instr->operands[0], 8);
       out.push_back(encoding);
       break;
    }