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https://gitlab.freedesktop.org/mesa/mesa.git
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r600: refactor step 1 - r600_texture cast is replaced by a function
This is done with the command below with some manual adjustments:
find . -type f -name "*.c" -exec grep -lE " = [(]struct[[:space:]]+r600_texture[[:space:]]*\*[)]" {} + |\
xargs sed -r -i "s/[(]struct[[:space:]]+r600_texture[[:space:]]*\*[)]([^;]*);/r600_as_texture(\1);/"
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35967>
This commit is contained in:
Patrick Lerda
Marge Bot
parent
91a3cf4f58
commit
43784efeba
8 changed files with 65 additions and 62 deletions
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@ -658,7 +658,7 @@ static void evergreen_fill_buffer_resource_words(struct r600_context *rctx,
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bool *skip_mip_address_reloc,
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unsigned tex_resource_words[8])
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{
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struct r600_texture *tmp = (struct r600_texture*)buffer;
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struct r600_texture *tmp = r600_as_texture(buffer);
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uint64_t va;
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int stride = util_format_get_blocksize(params->pipe_format);
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unsigned format, num_format, format_comp, endian;
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@ -702,7 +702,7 @@ static struct pipe_sampler_view *
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texture_buffer_sampler_view(struct r600_context *rctx,
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struct r600_pipe_sampler_view *view)
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{
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struct r600_texture *tmp = (struct r600_texture*)view->base.texture;
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struct r600_texture *tmp = r600_as_texture(view->base.texture);
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struct eg_buf_res_params params;
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memset(¶ms, 0, sizeof(params));
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@ -747,7 +747,7 @@ static int evergreen_fill_tex_resource_words(struct r600_context *rctx,
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unsigned tex_resource_words[8])
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{
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struct r600_screen *rscreen = (struct r600_screen*)rctx->b.b.screen;
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struct r600_texture *tmp = (struct r600_texture*)texture;
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struct r600_texture *tmp = r600_as_texture(texture);
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unsigned format, endian;
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uint32_t word4 = 0, yuv_format = 0, pitch = 0;
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unsigned char array_mode = 0, non_disp_tiling = 0;
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@ -936,7 +936,7 @@ evergreen_create_sampler_view_custom(struct pipe_context *ctx,
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{
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struct r600_context *rctx = (struct r600_context*)ctx;
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struct r600_pipe_sampler_view *view = CALLOC_STRUCT(r600_pipe_sampler_view);
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struct r600_texture *tmp = (struct r600_texture*)texture;
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struct r600_texture *tmp = r600_as_texture(texture);
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struct eg_tex_res_params params;
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int ret;
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@ -1333,7 +1333,7 @@ void evergreen_init_color_surface_rat(struct r600_context *rctx,
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void evergreen_init_color_surface(struct r600_context *rctx,
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struct r600_surface *surf)
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{
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struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
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struct r600_texture *rtex = r600_as_texture(surf->base.texture);
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unsigned level = surf->base.level;
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struct r600_tex_color_info color;
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@ -1365,7 +1365,7 @@ static void evergreen_init_depth_surface(struct r600_context *rctx,
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struct r600_surface *surf)
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{
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struct r600_screen *rscreen = rctx->screen;
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struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
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struct r600_texture *rtex = r600_as_texture(surf->base.texture);
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unsigned level = surf->base.level;
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struct legacy_surf_level *levelinfo = &rtex->surface.u.legacy.level[level];
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uint64_t offset;
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@ -1488,7 +1488,7 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
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target_mask |= (0xf << (i * 4));
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rtex = (struct r600_texture*)surf->base.texture;
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rtex = r600_as_texture(surf->base.texture);
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r600_context_add_resource_size(ctx, state->cbufs[i].texture);
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@ -1838,7 +1838,7 @@ static void evergreen_emit_image_state(struct r600_context *rctx, struct r600_at
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resource = (struct r600_resource *)image->base.resource;
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if (resource->b.b.target != PIPE_BUFFER)
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rtex = (struct r600_texture *)image->base.resource;
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rtex = r600_as_texture(image->base.resource);
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else
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rtex = NULL;
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@ -1971,7 +1971,7 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
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continue;
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}
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tex = (struct r600_texture *)cb->base.texture;
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tex = r600_as_texture(cb->base.texture);
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reloc = radeon_add_to_buffer_list(&rctx->b,
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&rctx->b.gfx,
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(struct r600_resource*)cb->base.texture,
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@ -2159,7 +2159,7 @@ static void evergreen_emit_db_state(struct r600_context *rctx, struct r600_atom
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struct r600_db_state *a = (struct r600_db_state*)atom;
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if (a->rsurf && a->rsurf->db_htile_surface) {
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struct r600_texture *rtex = (struct r600_texture *)a->rsurf->base.texture;
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struct r600_texture *rtex = r600_as_texture(a->rsurf->base.texture);
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unsigned reloc_idx;
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radeon_set_context_reg(cs, R_02802C_DB_DEPTH_CLEAR, fui(rtex->depth_clear_value));
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@ -4148,8 +4148,8 @@ static void evergreen_dma_copy_tile(struct r600_context *rctx,
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unsigned bpp)
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{
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struct radeon_cmdbuf *cs = &rctx->b.dma.cs;
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struct r600_texture *rsrc = (struct r600_texture*)src;
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struct r600_texture *rdst = (struct r600_texture*)dst;
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struct r600_texture *rsrc = r600_as_texture(src);
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struct r600_texture *rdst = r600_as_texture(dst);
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unsigned array_mode, lbpp, pitch_tile_max, slice_tile_max, size;
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unsigned ncopy, height, cheight, detile, i, x, y, z, src_mode, dst_mode;
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unsigned sub_cmd, bank_h, bank_w, mt_aspect, nbanks, tile_split, non_disp_tiling = 0;
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@ -4262,8 +4262,8 @@ static void evergreen_dma_copy(struct pipe_context *ctx,
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const struct pipe_box *src_box)
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{
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struct r600_context *rctx = (struct r600_context *)ctx;
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struct r600_texture *rsrc = (struct r600_texture*)src;
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struct r600_texture *rdst = (struct r600_texture*)dst;
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struct r600_texture *rsrc = r600_as_texture(src);
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struct r600_texture *rdst = r600_as_texture(dst);
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unsigned dst_pitch, src_pitch, bpp, dst_mode, src_mode, copy_height;
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unsigned src_w, dst_w;
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unsigned src_x, src_y;
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@ -4599,7 +4599,7 @@ static void evergreen_set_shader_images(struct pipe_context *ctx,
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evergreen_setup_immed_buffer(rctx, rview, iview->format);
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bool is_buffer = image->target == PIPE_BUFFER;
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struct r600_texture *rtex = (struct r600_texture *)image;
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struct r600_texture *rtex = r600_as_texture(image);
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if (!is_buffer && rtex->db_compatible)
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istate->compressed_depthtex_mask |= 1 << i;
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else
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@ -278,7 +278,7 @@ void r600_decompress_depth_textures(struct r600_context *rctx,
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assert(view);
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rview = (struct r600_pipe_sampler_view*)view;
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tex = (struct r600_texture *)view->texture;
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tex = r600_as_texture(view->texture);
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assert(tex->db_compatible);
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if (r600_can_sample_zs(tex, rview->is_stencil_sampler)) {
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@ -310,7 +310,7 @@ void r600_decompress_depth_images(struct r600_context *rctx,
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view = &images->views[i];
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assert(view);
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tex = (struct r600_texture *)view->base.resource;
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tex = r600_as_texture(view->base.resource);
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assert(tex->db_compatible);
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if (r600_can_sample_zs(tex, false)) {
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@ -389,7 +389,7 @@ void r600_decompress_color_textures(struct r600_context *rctx,
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view = &textures->views[i]->base;
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assert(view);
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tex = (struct r600_texture *)view->texture;
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tex = r600_as_texture(view->texture);
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assert(tex->cmask.size);
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r600_blit_decompress_color(&rctx->b.b, tex,
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@ -413,7 +413,7 @@ void r600_decompress_color_images(struct r600_context *rctx,
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view = &images->views[i];
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assert(view);
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tex = (struct r600_texture *)view->base.resource;
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tex = r600_as_texture(view->base.resource);
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assert(tex->cmask.size);
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r600_blit_decompress_color(&rctx->b.b, tex,
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@ -433,7 +433,7 @@ static bool r600_decompress_subresource(struct pipe_context *ctx,
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unsigned first_layer, unsigned last_layer)
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{
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struct r600_context *rctx = (struct r600_context *)ctx;
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struct r600_texture *rtex = (struct r600_texture*)tex;
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struct r600_texture *rtex = r600_as_texture(tex);
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if (rtex->db_compatible) {
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if (r600_can_sample_zs(rtex, false)) {
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@ -515,7 +515,7 @@ evergreen_do_fast_color_clear(struct r600_context *rctx,
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if (!(*buffers & clear_bit))
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continue;
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tex = (struct r600_texture *)rctx->framebuffer.fb_cbufs[i]->texture;
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tex = r600_as_texture(rctx->framebuffer.fb_cbufs[i]->texture);
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/* the clear is allowed if all layers are bound */
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if (fb->cbufs[i].first_layer != 0 ||
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@ -614,7 +614,7 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers,
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if (!fb->cbufs[i].texture)
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continue;
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tex = (struct r600_texture *)fb->cbufs[i].texture;
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tex = r600_as_texture(fb->cbufs[i].texture);
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if (tex->fmask.size == 0)
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tex->dirty_level_mask &= ~(1 << fb->cbufs[i].level);
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}
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@ -625,7 +625,7 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers,
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struct r600_texture *rtex;
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unsigned level = fb->zsbuf.level;
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rtex = (struct r600_texture*)fb->zsbuf.texture;
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rtex = r600_as_texture(fb->zsbuf.texture);
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/* We can't use hyperz fast clear if each slice of a texture
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* array are clear to different value. To simplify code just
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@ -1020,7 +1020,7 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
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const struct pipe_blit_info *info)
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{
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struct r600_context *rctx = (struct r600_context*)ctx;
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struct r600_texture *dst = (struct r600_texture*)info->dst.resource;
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struct r600_texture *dst = r600_as_texture(info->dst.resource);
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unsigned dst_width = u_minify(info->dst.resource->width0, info->dst.level);
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unsigned dst_height = u_minify(info->dst.resource->height0, info->dst.level);
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enum pipe_format format = info->src.format;
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@ -1173,7 +1173,7 @@ static void r600_blit(struct pipe_context *ctx,
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const struct pipe_blit_info *info)
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{
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struct r600_context *rctx = (struct r600_context*)ctx;
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struct r600_texture *rdst = (struct r600_texture *)info->dst.resource;
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struct r600_texture *rdst = r600_as_texture(info->dst.resource);
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if (do_hardware_msaa_resolve(ctx, info)) {
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return;
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@ -1262,7 +1262,7 @@ static void r600_blit(struct pipe_context *ctx,
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static void r600_flush_resource(struct pipe_context *ctx,
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struct pipe_resource *res)
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{
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struct r600_texture *rtex = (struct r600_texture*)res;
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struct r600_texture *rtex = r600_as_texture(res);
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assert(res->target != PIPE_BUFFER);
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@ -948,6 +948,12 @@ r600_htile_enabled(struct r600_texture *tex, unsigned level)
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return tex->htile_offset && level == 0;
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}
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static inline struct r600_texture *
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r600_as_texture(struct pipe_resource *res)
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{
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return (struct r600_texture *)res;
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}
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#define COMPUTE_DBG(rscreen, fmt, args...) \
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do { \
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if ((rscreen->b.debug_flags & DBG_COMPUTE)) fprintf(stderr, fmt, ##args); \
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@ -619,7 +619,7 @@ texture_buffer_sampler_view(struct pipe_context *ctx,
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struct r600_pipe_sampler_view *view)
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{
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struct r600_context *rctx = (struct r600_context *)ctx;
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struct r600_texture *tmp = (struct r600_texture*)view->base.texture;
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struct r600_texture *tmp = r600_as_texture(view->base.texture);
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const unsigned stride = util_format_get_blocksize(view->base.format);
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unsigned format, num_format, format_comp, endian;
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uint64_t offset = view->base.u.buf.offset;
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@ -661,7 +661,7 @@ r600_create_sampler_view_custom(struct pipe_context *ctx,
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unsigned width_first_level, unsigned height_first_level)
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{
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struct r600_pipe_sampler_view *view = CALLOC_STRUCT(r600_pipe_sampler_view);
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struct r600_texture *tmp = (struct r600_texture*)texture;
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struct r600_texture *tmp = r600_as_texture(texture);
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unsigned format, endian;
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uint32_t word4 = 0, yuv_format = 0, pitch = 0;
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unsigned char swizzle[4], array_mode = 0;
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@ -804,7 +804,7 @@ static void r600_init_color_surface(struct r600_context *rctx,
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bool force_cmask_fmask)
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{
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struct r600_screen *rscreen = rctx->screen;
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struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
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struct r600_texture *rtex = r600_as_texture(surf->base.texture);
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unsigned level = surf->base.level;
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unsigned pitch, slice;
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unsigned color_info;
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@ -1030,7 +1030,7 @@ static void r600_init_color_surface(struct r600_context *rctx,
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static void r600_init_depth_surface(struct r600_context *rctx,
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struct r600_surface *surf)
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{
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struct r600_texture *rtex = (struct r600_texture*)surf->base.texture;
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struct r600_texture *rtex = r600_as_texture(surf->base.texture);
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unsigned level, pitch, slice, format, offset, array_mode;
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level = surf->base.level;
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@ -1119,7 +1119,7 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
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if (!surf)
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continue;
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rtex = (struct r600_texture*)surf->base.texture;
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rtex = r600_as_texture(surf->base.texture);
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r600_context_add_resource_size(ctx, state->cbufs[i].texture);
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target_mask |= (0xf << (i * 4));
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@ -1541,7 +1541,7 @@ static void r600_emit_db_state(struct r600_context *rctx, struct r600_atom *atom
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struct r600_db_state *a = (struct r600_db_state*)atom;
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if (a->rsurf && a->rsurf->db_htile_surface) {
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struct r600_texture *rtex = (struct r600_texture *)a->rsurf->base.texture;
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struct r600_texture *rtex = r600_as_texture(a->rsurf->base.texture);
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unsigned reloc_idx;
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radeon_set_context_reg(cs, R_02802C_DB_DEPTH_CLEAR, fui(rtex->depth_clear_value));
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@ -2877,8 +2877,8 @@ static bool r600_dma_copy_tile(struct r600_context *rctx,
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unsigned bpp)
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{
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struct radeon_cmdbuf *cs = &rctx->b.dma.cs;
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struct r600_texture *rsrc = (struct r600_texture*)src;
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struct r600_texture *rdst = (struct r600_texture*)dst;
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struct r600_texture *rsrc = r600_as_texture(src);
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struct r600_texture *rdst = r600_as_texture(dst);
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unsigned array_mode, lbpp, pitch_tile_max, slice_tile_max, size;
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unsigned ncopy, height, cheight, detile, i, x, y, z, src_mode, dst_mode;
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uint64_t base, addr;
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@ -2973,8 +2973,8 @@ static void r600_dma_copy(struct pipe_context *ctx,
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const struct pipe_box *src_box)
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{
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struct r600_context *rctx = (struct r600_context *)ctx;
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struct r600_texture *rsrc = (struct r600_texture*)src;
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struct r600_texture *rdst = (struct r600_texture*)dst;
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struct r600_texture *rsrc = r600_as_texture(src);
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struct r600_texture *rdst = r600_as_texture(dst);
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unsigned dst_pitch, src_pitch, bpp, dst_mode, src_mode, copy_height;
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unsigned src_w, dst_w;
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unsigned src_x, src_y;
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@ -670,7 +670,7 @@ static void r600_set_sampler_views(struct pipe_context *pipe,
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if (rviews[i]) {
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struct r600_texture *rtex =
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(struct r600_texture*)rviews[i]->base.texture;
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r600_as_texture(rviews[i]->base.texture);
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bool is_buffer = rviews[i]->base.texture->target == PIPE_BUFFER;
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if (!is_buffer && rtex->db_compatible) {
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@ -728,7 +728,7 @@ static void r600_update_compressed_colortex_mask(struct r600_samplerview_state *
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struct pipe_resource *res = views->views[i]->base.texture;
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if (res && res->target != PIPE_BUFFER) {
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struct r600_texture *rtex = (struct r600_texture *)res;
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struct r600_texture *rtex = r600_as_texture(res);
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if (rtex->cmask.size) {
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views->compressed_colortex_mask |= 1 << i;
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@ -780,7 +780,7 @@ static void r600_update_compressed_colortex_mask_images(struct r600_image_state
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struct pipe_resource *res = images->views[i].base.resource;
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if (res && res->target != PIPE_BUFFER) {
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struct r600_texture *rtex = (struct r600_texture *)res;
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struct r600_texture *rtex = r600_as_texture(res);
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if (rtex->cmask.size) {
|
||||
images->compressed_colortex_mask |= 1 << i;
|
||||
|
|
@ -3000,7 +3000,7 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
|
|||
/* Set the depth buffer as dirty. */
|
||||
if (rctx->framebuffer.state.zsbuf.texture) {
|
||||
struct pipe_surface *surf = &rctx->framebuffer.state.zsbuf;
|
||||
struct r600_texture *rtex = (struct r600_texture *)surf->texture;
|
||||
struct r600_texture *rtex = r600_as_texture(surf->texture);
|
||||
|
||||
rtex->dirty_level_mask |= 1 << surf->level;
|
||||
|
||||
|
|
@ -3015,7 +3015,7 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
|
|||
do {
|
||||
unsigned i = u_bit_scan(&mask);
|
||||
surf = rctx->framebuffer.fb_cbufs[i];
|
||||
rtex = (struct r600_texture*)surf->texture;
|
||||
rtex = r600_as_texture(surf->texture);
|
||||
|
||||
rtex->dirty_level_mask |= 1 << surf->level;
|
||||
|
||||
|
|
|
|||
|
|
@ -255,8 +255,8 @@ void r600_test_dma(struct r600_common_screen *rscreen)
|
|||
dst = screen->resource_create(screen, &tdst);
|
||||
assert(src);
|
||||
assert(dst);
|
||||
rdst = (struct r600_texture*)dst;
|
||||
rsrc = (struct r600_texture*)src;
|
||||
rdst = r600_as_texture(dst);
|
||||
rsrc = r600_as_texture(src);
|
||||
alloc_cpu_texture(&src_cpu, &tsrc, bpp);
|
||||
alloc_cpu_texture(&dst_cpu, &tdst, bpp);
|
||||
|
||||
|
|
|
|||
|
|
@ -363,7 +363,7 @@ static void r600_reallocate_texture_inplace(struct r600_common_context *rctx,
|
|||
return;
|
||||
}
|
||||
|
||||
new_tex = (struct r600_texture*)screen->resource_create(screen, &templ);
|
||||
new_tex = r600_as_texture(screen->resource_create(screen, &templ));
|
||||
if (!new_tex)
|
||||
return;
|
||||
|
||||
|
|
@ -429,7 +429,7 @@ static void r600_texture_get_info(struct pipe_screen* screen,
|
|||
unsigned *poffset)
|
||||
{
|
||||
struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
|
||||
struct r600_texture *rtex = (struct r600_texture*)resource;
|
||||
struct r600_texture *rtex = r600_as_texture(resource);
|
||||
unsigned stride = 0;
|
||||
unsigned offset = 0;
|
||||
|
||||
|
|
@ -458,7 +458,7 @@ static bool r600_texture_get_handle(struct pipe_screen* screen,
|
|||
struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
|
||||
struct r600_common_context *rctx;
|
||||
struct r600_resource *res = (struct r600_resource*)resource;
|
||||
struct r600_texture *rtex = (struct r600_texture*)resource;
|
||||
struct r600_texture *rtex = r600_as_texture(resource);
|
||||
struct radeon_bo_metadata metadata;
|
||||
bool update_metadata = false;
|
||||
unsigned stride, offset, slice_size;
|
||||
|
|
@ -559,7 +559,7 @@ static bool r600_texture_get_handle(struct pipe_screen* screen,
|
|||
void r600_texture_destroy(struct pipe_screen *screen, struct pipe_resource *ptex)
|
||||
{
|
||||
struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
|
||||
struct r600_texture *rtex = (struct r600_texture*)ptex;
|
||||
struct r600_texture *rtex = r600_as_texture(ptex);
|
||||
struct r600_resource *resource = &rtex->resource;
|
||||
|
||||
r600_texture_reference(&rtex->flushed_depth_texture, NULL);
|
||||
|
|
@ -1126,7 +1126,7 @@ bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
|
|||
struct pipe_resource *texture,
|
||||
struct r600_texture **staging)
|
||||
{
|
||||
struct r600_texture *rtex = (struct r600_texture*)texture;
|
||||
struct r600_texture *rtex = r600_as_texture(texture);
|
||||
struct pipe_resource resource;
|
||||
struct r600_texture **flushed_depth_texture = staging ?
|
||||
staging : &rtex->flushed_depth_texture;
|
||||
|
|
@ -1181,7 +1181,7 @@ bool r600_init_flushed_depth_texture(struct pipe_context *ctx,
|
|||
if (staging)
|
||||
resource.flags |= R600_RESOURCE_FLAG_TRANSFER;
|
||||
|
||||
*flushed_depth_texture = (struct r600_texture *)ctx->screen->resource_create(ctx->screen, &resource);
|
||||
*flushed_depth_texture = r600_as_texture(ctx->screen->resource_create(ctx->screen, &resource));
|
||||
if (*flushed_depth_texture == NULL) {
|
||||
R600_ERR("failed to create temporary texture to hold flushed depth\n");
|
||||
return false;
|
||||
|
|
@ -1264,7 +1264,7 @@ void *r600_texture_transfer_map(struct pipe_context *ctx,
|
|||
struct pipe_transfer **ptransfer)
|
||||
{
|
||||
struct r600_common_context *rctx = (struct r600_common_context*)ctx;
|
||||
struct r600_texture *rtex = (struct r600_texture*)texture;
|
||||
struct r600_texture *rtex = r600_as_texture(texture);
|
||||
struct r600_transfer *trans;
|
||||
struct r600_resource *buf;
|
||||
unsigned offset = 0;
|
||||
|
|
@ -1363,7 +1363,7 @@ void *r600_texture_transfer_map(struct pipe_context *ctx,
|
|||
}
|
||||
|
||||
r600_copy_region_with_blit(ctx, temp, 0, 0, 0, 0, texture, level, box);
|
||||
rctx->blit_decompress_depth(ctx, (struct r600_texture*)temp, staging_depth,
|
||||
rctx->blit_decompress_depth(ctx, r600_as_texture(temp), staging_depth,
|
||||
0, 0, 0, box->depth, 0, 0);
|
||||
pipe_resource_reference(&temp, NULL);
|
||||
}
|
||||
|
|
@ -1404,7 +1404,7 @@ void *r600_texture_transfer_map(struct pipe_context *ctx,
|
|||
PIPE_USAGE_STAGING : PIPE_USAGE_STREAM;
|
||||
|
||||
/* Create the temporary texture. */
|
||||
staging = (struct r600_texture*)ctx->screen->resource_create(ctx->screen, &resource);
|
||||
staging = r600_as_texture(ctx->screen->resource_create(ctx->screen, &resource));
|
||||
if (!staging) {
|
||||
R600_ERR("failed to create temporary texture to hold untiled copy\n");
|
||||
FREE(trans);
|
||||
|
|
@ -1447,7 +1447,7 @@ void r600_texture_transfer_unmap(struct pipe_context *ctx,
|
|||
struct r600_common_context *rctx = (struct r600_common_context*)ctx;
|
||||
struct r600_transfer *rtransfer = (struct r600_transfer*)transfer;
|
||||
struct pipe_resource *texture = transfer->resource;
|
||||
struct r600_texture *rtex = (struct r600_texture*)texture;
|
||||
struct r600_texture *rtex = r600_as_texture(texture);
|
||||
|
||||
if ((transfer->usage & PIPE_MAP_WRITE) && rtransfer->staging) {
|
||||
if (rtex->is_depth && rtex->resource.b.b.nr_samples <= 1) {
|
||||
|
|
|
|||
|
|
@ -58,8 +58,7 @@ struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe,
|
|||
PIPE_USAGE_DEFAULT, 0, chroma_format);
|
||||
if (ctx->b.gfx_level < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
|
||||
templ.bind = PIPE_BIND_LINEAR;
|
||||
resources[0] = (struct r600_texture *)
|
||||
pipe->screen->resource_create(pipe->screen, &templ);
|
||||
resources[0] = r600_as_texture(pipe->screen->resource_create(pipe->screen, &templ));
|
||||
if (!resources[0])
|
||||
goto error;
|
||||
|
||||
|
|
@ -68,8 +67,7 @@ struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe,
|
|||
PIPE_USAGE_DEFAULT, 1, chroma_format);
|
||||
if (ctx->b.gfx_level < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
|
||||
templ.bind = PIPE_BIND_LINEAR;
|
||||
resources[1] = (struct r600_texture *)
|
||||
pipe->screen->resource_create(pipe->screen, &templ);
|
||||
resources[1] = r600_as_texture(pipe->screen->resource_create(pipe->screen, &templ));
|
||||
if (!resources[1])
|
||||
goto error;
|
||||
}
|
||||
|
|
@ -79,8 +77,7 @@ struct pipe_video_buffer *r600_video_buffer_create(struct pipe_context *pipe,
|
|||
PIPE_USAGE_DEFAULT, 2, chroma_format);
|
||||
if (ctx->b.gfx_level < EVERGREEN || tmpl->interlaced || !R600_UVD_ENABLE_TILING)
|
||||
templ.bind = PIPE_BIND_LINEAR;
|
||||
resources[2] = (struct r600_texture *)
|
||||
pipe->screen->resource_create(pipe->screen, &templ);
|
||||
resources[2] = r600_as_texture(pipe->screen->resource_create(pipe->screen, &templ));
|
||||
if (!resources[2])
|
||||
goto error;
|
||||
}
|
||||
|
|
@ -134,8 +131,8 @@ static uint32_t eg_num_banks(uint32_t nbanks)
|
|||
static struct pb_buffer_lean* r600_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
|
||||
{
|
||||
struct r600_screen *rscreen = (struct r600_screen*)buf->base.context->screen;
|
||||
struct r600_texture *luma = (struct r600_texture *)buf->resources[0];
|
||||
struct r600_texture *chroma = (struct r600_texture *)buf->resources[1];
|
||||
struct r600_texture *luma = r600_as_texture(buf->resources[0]);
|
||||
struct r600_texture *chroma = r600_as_texture(buf->resources[1]);
|
||||
|
||||
msg->body.decode.dt_field_mode = buf->base.interlaced;
|
||||
msg->body.decode.dt_surf_tile_config |= RUVD_NUM_BANKS(eg_num_banks(rscreen->b.info.r600_num_banks));
|
||||
|
|
@ -150,7 +147,7 @@ static void r600_vce_get_buffer(struct pipe_resource *resource,
|
|||
struct pb_buffer_lean **handle,
|
||||
struct radeon_surf **surface)
|
||||
{
|
||||
struct r600_texture *res = (struct r600_texture *)resource;
|
||||
struct r600_texture *res = r600_as_texture(resource);
|
||||
|
||||
if (handle)
|
||||
*handle = res->resource.buf;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue