diff --git a/src/gallium/drivers/r300/compiler/radeon_regalloc.c b/src/gallium/drivers/r300/compiler/radeon_regalloc.c
index bc10a176a99..2d6525fead8 100644
--- a/src/gallium/drivers/r300/compiler/radeon_regalloc.c
+++ b/src/gallium/drivers/r300/compiler/radeon_regalloc.c
@@ -33,6 +33,37 @@
 
 #define DBG(...) do { if (VERBOSE) fprintf(stderr, __VA_ARGS__); } while(0)
 
+const struct rc_class rc_class_list_vp [] = {
+	{RC_REG_CLASS_VP_SINGLE, 4,
+		{RC_MASK_X,
+		 RC_MASK_Y,
+		 RC_MASK_Z,
+		 RC_MASK_W,
+		 RC_MASK_NONE,
+		 RC_MASK_NONE}},
+	{RC_REG_CLASS_VP_DOUBLE, 6,
+		{RC_MASK_X | RC_MASK_Y,
+		 RC_MASK_X | RC_MASK_Z,
+		 RC_MASK_X | RC_MASK_W,
+		 RC_MASK_Y | RC_MASK_Z,
+		 RC_MASK_Y | RC_MASK_W,
+		 RC_MASK_Z | RC_MASK_W}},
+	{RC_REG_CLASS_VP_TRIPLE, 4,
+		{RC_MASK_X | RC_MASK_Y | RC_MASK_Z,
+		 RC_MASK_X | RC_MASK_Y | RC_MASK_W,
+		 RC_MASK_X | RC_MASK_Z | RC_MASK_W,
+		 RC_MASK_Y | RC_MASK_Z | RC_MASK_W,
+		 RC_MASK_NONE,
+		 RC_MASK_NONE}},
+	{RC_REG_CLASS_VP_QUADRUPLE, 1,
+		{RC_MASK_X | RC_MASK_Y | RC_MASK_Z | RC_MASK_W,
+		 RC_MASK_NONE,
+		 RC_MASK_NONE,
+		 RC_MASK_NONE,
+		 RC_MASK_NONE,
+		 RC_MASK_NONE}}
+};
+
 const struct rc_class rc_class_list_fp [] = {
 	{RC_REG_CLASS_FP_SINGLE, 3,
 		{RC_MASK_X,
diff --git a/src/gallium/drivers/r300/compiler/radeon_regalloc.h b/src/gallium/drivers/r300/compiler/radeon_regalloc.h
index 0b9df2b3969..83f8e673fdc 100644
--- a/src/gallium/drivers/r300/compiler/radeon_regalloc.h
+++ b/src/gallium/drivers/r300/compiler/radeon_regalloc.h
@@ -59,6 +59,14 @@ enum rc_reg_class {
 	RC_REG_CLASS_FP_COUNT
 };
 
+enum rc_reg_class_vp {
+	RC_REG_CLASS_VP_SINGLE,
+	RC_REG_CLASS_VP_DOUBLE,
+	RC_REG_CLASS_VP_TRIPLE,
+	RC_REG_CLASS_VP_QUADRUPLE,
+	RC_REG_CLASS_VP_COUNT
+};
+
 struct rc_regalloc_state {
 	struct ra_regs *regs;
 	struct ra_class *classes[RC_REG_CLASS_FP_COUNT];