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broadcom/compiler: preserve ordering of unifa/ldunifa sequences
unifa writes the addresss from which follow-up ldunifa loads, and each ldunifa increments the unifa addeess by 32-bit so the loads need to be ordered too. Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8980>
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1 changed files with 10 additions and 0 deletions
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@ -83,6 +83,7 @@ struct schedule_state {
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struct schedule_node *last_vpm;
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struct schedule_node *last_unif;
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struct schedule_node *last_rtop;
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struct schedule_node *last_unifa;
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enum direction dir;
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/* Estimated cycle when the current instruction would start. */
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uint32_t time;
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@ -228,6 +229,11 @@ process_waddr_deps(struct schedule_state *state, struct schedule_node *n,
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add_write_dep(state, &state->last_tmu_write, n);
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break;
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case V3D_QPU_WADDR_UNIFA:
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if (state->devinfo->ver >= 40)
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add_write_dep(state, &state->last_unifa, n);
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break;
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case V3D_QPU_WADDR_NOP:
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break;
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@ -400,6 +406,10 @@ calculate_deps(struct schedule_state *state, struct schedule_node *n)
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if (vir_has_uniform(qinst))
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add_write_dep(state, &state->last_unif, n);
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/* Both unifa and ldunifa must preserve ordering */
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if (inst->sig.ldunifa || inst->sig.ldunifarf)
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add_write_dep(state, &state->last_unifa, n);
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if (v3d_qpu_reads_flags(inst))
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add_read_dep(state, state->last_sf, n);
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if (v3d_qpu_writes_flags(inst))
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