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radeonsi: don't add the tess ring buffers into the cs_preamble state
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
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1c1d34a67a
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428360662f
2 changed files with 5 additions and 3 deletions
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@ -415,6 +415,11 @@ void si_begin_new_gfx_cs(struct si_context *ctx)
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return;
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}
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if (ctx->tess_rings) {
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radeon_add_to_buffer_list(ctx, ctx->gfx_cs, si_resource(ctx->tess_rings),
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RADEON_USAGE_READWRITE, RADEON_PRIO_SHADER_RINGS);
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}
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/* set all valid group as dirty so they get reemited on
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* next draw command
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*/
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@ -3640,9 +3640,6 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
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si_cs_preamble_add_vgt_flush(sctx);
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si_pm4_add_bo(sctx->cs_preamble_state, si_resource(sctx->tess_rings), RADEON_USAGE_READWRITE,
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RADEON_PRIO_SHADER_RINGS);
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uint64_t factor_va =
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si_resource(sctx->tess_rings)->gpu_address + sctx->screen->tess_offchip_ring_size;
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