radeonsi: don't add the tess ring buffers into the cs_preamble state

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5603>
This commit is contained in:
Marek Olšák 2020-06-16 13:56:10 -04:00 committed by Marge Bot
parent 1c1d34a67a
commit 428360662f
2 changed files with 5 additions and 3 deletions

View file

@ -415,6 +415,11 @@ void si_begin_new_gfx_cs(struct si_context *ctx)
return;
}
if (ctx->tess_rings) {
radeon_add_to_buffer_list(ctx, ctx->gfx_cs, si_resource(ctx->tess_rings),
RADEON_USAGE_READWRITE, RADEON_PRIO_SHADER_RINGS);
}
/* set all valid group as dirty so they get reemited on
* next draw command
*/

View file

@ -3640,9 +3640,6 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
si_cs_preamble_add_vgt_flush(sctx);
si_pm4_add_bo(sctx->cs_preamble_state, si_resource(sctx->tess_rings), RADEON_USAGE_READWRITE,
RADEON_PRIO_SHADER_RINGS);
uint64_t factor_va =
si_resource(sctx->tess_rings)->gpu_address + sctx->screen->tess_offchip_ring_size;