From 42559426547128d96093e00213e174142b75f1bd Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Fri, 30 Apr 2021 11:39:12 +0100 Subject: [PATCH] radv,ac/llvm: use a dword alignment for descriptor loads MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit RADV doesn't try to keep anything 16 or 32 byte aligned. RADV also seems to create better code for some reason. fossil-db (Sienna Cichlid): Totals from 37693 (30.93% of 121873) affected shaders: SGPRs: 1762792 -> 1785504 (+1.29%); split: -1.01%, +2.30% VGPRs: 1761032 -> 1760808 (-0.01%); split: -0.09%, +0.07% SpillSGPRs: 55793 -> 56011 (+0.39%); split: -3.49%, +3.88% SpillVGPRs: 16766 -> 16387 (-2.26%); split: -3.99%, +1.73% CodeSize: 82902228 -> 82781608 (-0.15%); split: -0.29%, +0.14% Scratch: 3024896 -> 2987008 (-1.25%); split: -3.08%, +1.83% MaxWaves: 919794 -> 920302 (+0.06%); split: +0.09%, -0.03% shader-db (Sienna Cichlid): Totals from affected shaders: SGPRS: 3976 -> 3976 (0.00 %) VGPRS: 3392 -> 3392 (0.00 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 178792 -> 178980 (0.11 %) bytes Max Waves: 1389 -> 1389 (0.00 %) Signed-off-by: Rhys Perry Reviewed-by: Marek Olšák Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4715 Part-of: (cherry picked from commit d918a59d15fdba02f57e40039acc5baf6fef67e7) --- .pick_status.json | 2 +- src/amd/llvm/ac_llvm_build.c | 3 ++- src/amd/vulkan/radv_nir_to_llvm.c | 3 +++ 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index fa6eb7ae3bb..b3040a3a94a 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -220,7 +220,7 @@ "description": "radv,ac/llvm: use a dword alignment for descriptor loads", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "master_sha": null, "because_sha": null }, diff --git a/src/amd/llvm/ac_llvm_build.c b/src/amd/llvm/ac_llvm_build.c index 1bc0ef6086d..6106c47f6e4 100644 --- a/src/amd/llvm/ac_llvm_build.c +++ b/src/amd/llvm/ac_llvm_build.c @@ -1066,6 +1066,7 @@ static LLVMValueRef ac_build_load_custom(struct ac_llvm_context *ctx, LLVMValueR result = LLVMBuildLoad(ctx->builder, pointer, ""); if (invariant) LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md); + LLVMSetAlignment(result, 4); return result; } @@ -4761,7 +4762,7 @@ LLVMValueRef ac_build_main(const struct ac_shader_args *args, struct ac_llvm_con if (LLVMGetTypeKind(LLVMTypeOf(P)) == LLVMPointerTypeKind) { ac_add_function_attr(ctx->context, main_function, i + 1, AC_FUNC_ATTR_NOALIAS); ac_add_attr_dereferenceable(P, UINT64_MAX); - ac_add_attr_alignment(P, 32); + ac_add_attr_alignment(P, 4); } } diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 59e9fee3118..39abac0d207 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -122,6 +122,7 @@ load_descriptor_sets(struct radv_shader_context *ctx) ctx->descriptor_sets[i] = ac_build_load_to_sgpr(&ctx->ac, desc_sets, LLVMConstInt(ctx->ac.i32, i, false)); + LLVMSetAlignment(ctx->descriptor_sets[i], 4); } } else { while (mask) { @@ -437,6 +438,7 @@ radv_load_ssbo(struct ac_shader_abi *abi, LLVMValueRef buffer_ptr, bool write, b result = LLVMBuildLoad(ctx->ac.builder, buffer_ptr, ""); LLVMSetMetadata(result, ctx->ac.invariant_load_md_kind, ctx->ac.empty_md); + LLVMSetAlignment(result, 4); return result; } @@ -481,6 +483,7 @@ radv_load_ubo(struct ac_shader_abi *abi, unsigned desc_set, unsigned binding, bo result = LLVMBuildLoad(ctx->ac.builder, buffer_ptr, ""); LLVMSetMetadata(result, ctx->ac.invariant_load_md_kind, ctx->ac.empty_md); + LLVMSetAlignment(result, 4); return result; }