fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-21 22:20:14 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

i965/fs: introduce non-compressed equivalent of tex_cms

Browse source 
v2: introduces 'SHADER_OPCODE_TXF_UMS' also for gen8

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
This commit is contained in:
Topi Pohjolainen 2013-12-10 16:38:15 +02:00
parent ce527a6722
commit 41d397f22b
4 changed files with 13 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
src/mesa/drivers/dri/i965/brw_defines.h
View file

@ -771,6 +771,7 @@ enum opcode {
SHADER_OPCODE_TXS, SHADER_OPCODE_TXS,
FS_OPCODE_TXB, FS_OPCODE_TXB,
SHADER_OPCODE_TXF_CMS, SHADER_OPCODE_TXF_CMS,
SHADER_OPCODE_TXF_UMS,
SHADER_OPCODE_TXF_MCS, SHADER_OPCODE_TXF_MCS,
SHADER_OPCODE_LOD, SHADER_OPCODE_LOD,
SHADER_OPCODE_TG4, SHADER_OPCODE_TG4,

5
src/mesa/drivers/dri/i965/brw_fs_generator.cpp
View file

@ -431,6 +431,10 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
else else
msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LD; msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LD;
break; break;
case SHADER_OPCODE_TXF_UMS:
assert(brw->gen >= 7);
msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS;
break;
case SHADER_OPCODE_TXF_MCS: case SHADER_OPCODE_TXF_MCS:
assert(brw->gen >= 7); assert(brw->gen >= 7);
msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS; msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS;
@ -1670,6 +1674,7 @@ fs_generator::generate_code(exec_list *instructions)
case SHADER_OPCODE_TXD: case SHADER_OPCODE_TXD:
case SHADER_OPCODE_TXF: case SHADER_OPCODE_TXF:
case SHADER_OPCODE_TXF_CMS: case SHADER_OPCODE_TXF_CMS:
case SHADER_OPCODE_TXF_UMS:
case SHADER_OPCODE_TXF_MCS: case SHADER_OPCODE_TXF_MCS:
case SHADER_OPCODE_TXL: case SHADER_OPCODE_TXL:
case SHADER_OPCODE_TXS: case SHADER_OPCODE_TXS:

3
src/mesa/drivers/dri/i965/brw_shader.cpp
View file

@ -442,6 +442,8 @@ brw_instruction_name(enum opcode op)
return "txb"; return "txb";
case SHADER_OPCODE_TXF_CMS: case SHADER_OPCODE_TXF_CMS:
return "txf_cms"; return "txf_cms";
case SHADER_OPCODE_TXF_UMS:
return "txf_ums";
case SHADER_OPCODE_TXF_MCS: case SHADER_OPCODE_TXF_MCS:
return "txf_mcs"; return "txf_mcs";
case SHADER_OPCODE_TG4: case SHADER_OPCODE_TG4:
@ -539,6 +541,7 @@ backend_instruction::is_tex()
opcode == SHADER_OPCODE_TXD || opcode == SHADER_OPCODE_TXD ||
opcode == SHADER_OPCODE_TXF || opcode == SHADER_OPCODE_TXF ||
opcode == SHADER_OPCODE_TXF_CMS || opcode == SHADER_OPCODE_TXF_CMS ||
opcode == SHADER_OPCODE_TXF_UMS ||
opcode == SHADER_OPCODE_TXF_MCS || opcode == SHADER_OPCODE_TXF_MCS ||
opcode == SHADER_OPCODE_TXL || opcode == SHADER_OPCODE_TXL ||
opcode == SHADER_OPCODE_TXS || opcode == SHADER_OPCODE_TXS ||

4
src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
View file

@ -197,6 +197,9 @@ gen8_fs_generator::generate_tex(fs_inst *ir,
case SHADER_OPCODE_TXF_CMS: case SHADER_OPCODE_TXF_CMS:
msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS; msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS;
break; break;
case SHADER_OPCODE_TXF_UMS:
msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS;
break;
case SHADER_OPCODE_TXF_MCS: case SHADER_OPCODE_TXF_MCS:
msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS; msg_type = GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS;
break; break;
@ -864,6 +867,7 @@ gen8_fs_generator::generate_code(exec_list *instructions)
case SHADER_OPCODE_TXD: case SHADER_OPCODE_TXD:
case SHADER_OPCODE_TXF: case SHADER_OPCODE_TXF:
case SHADER_OPCODE_TXF_CMS: case SHADER_OPCODE_TXF_CMS:
case SHADER_OPCODE_TXF_UMS:
case SHADER_OPCODE_TXF_MCS: case SHADER_OPCODE_TXF_MCS:
case SHADER_OPCODE_TXL: case SHADER_OPCODE_TXL:
case SHADER_OPCODE_TXS: case SHADER_OPCODE_TXS: