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radv/video: take db alignment into account when allocating images.

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Make sure to take the db alignment into account when sizing the underlying
images.

Fixes a 360p sample from Lynne.

Cc: mesa-stable
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25168>
(cherry picked from commit 3740b6f599)
This commit is contained in:
Dave Airlie 2023-09-12 12:24:54 +10:00 • committed by Dylan Baker
parent 814b8bf593
commit 41cee21f62
4 changed files with 36 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
.pick_status.json
View file

@ -3064,7 +3064,7 @@
"description": "radv/video: take db alignment into account when allocating images.",
"nominated": true,
"nomination_type": 0,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": null,
"notes": null

2
src/amd/vulkan/radv_image.c
View file

@ -1720,7 +1720,7 @@ radv_image_create_layout(struct radv_device *device, struct radv_image_create_in
if (image->vk.usage & (VK_IMAGE_USAGE_VIDEO_DECODE_DST_BIT_KHR | VK_IMAGE_USAGE_VIDEO_DECODE_DPB_BIT_KHR)) {
assert(profile_list);
uint32_t width_align, height_align;
vk_video_get_profile_alignments(profile_list, &width_align, &height_align);
radv_video_get_profile_alignments(device->physical_device, profile_list, &width_align, &height_align);
image_info.width = align(image_info.width, width_align);
image_info.height = align(image_info.height, height_align);
}

4
src/amd/vulkan/radv_private.h
View file

@ -3597,7 +3597,9 @@ radv_queue_ring(const struct radv_queue *queue)
/* radv_video */
void radv_init_physical_device_decoder(struct radv_physical_device *pdevice);
void radv_video_get_profile_alignments(struct radv_physical_device *pdevice,
const VkVideoProfileListInfoKHR *profile_list, uint32_t *width_align_out,
uint32_t *height_align_out);
/**
* Helper used for debugging compiler issues by enabling/disabling LLVM for a
* specific shader stage (developers only).

36
src/amd/vulkan/radv_video.c
View file

@ -57,6 +57,14 @@ radv_enable_tier2(struct radv_physical_device *pdevice)
return false;
}
static uint32_t
radv_video_get_db_alignment(struct radv_physical_device *pdevice, int width, bool is_h265_main_10)
{
if (pdevice->rad_info.family >= CHIP_RENOIR && width > 32 && is_h265_main_10)
return 64;
return 32;
}
static bool
radv_vid_buffer_upload_alloc(struct radv_cmd_buffer *cmd_buffer, unsigned size, unsigned *out_offset, void **ptr)
{
@ -305,11 +313,9 @@ radv_CreateVideoSessionKHR(VkDevice _device, const VkVideoSessionCreateInfoKHR *
vid->stream_handle = si_vid_alloc_stream_handle(device->physical_device);
vid->dbg_frame_cnt = 0;
vid->db_alignment =
(device->physical_device->rad_info.family >= CHIP_RENOIR && vid->vk.max_coded.width > 32 &&
(vid->stream_type == RDECODE_CODEC_H265 && vid->vk.h265.profile_idc == STD_VIDEO_H265_PROFILE_IDC_MAIN_10))
? 64
: 32;
vid->db_alignment = radv_video_get_db_alignment(
device->physical_device, vid->vk.max_coded.width,
vid->stream_type == RDECODE_CODEC_H265 && vid->vk.h265.profile_idc == STD_VIDEO_H265_PROFILE_IDC_MAIN_10);
*pVideoSession = radv_video_session_to_handle(vid);
return VK_SUCCESS;
@ -1877,3 +1883,23 @@ radv_CmdDecodeVideoKHR(VkCommandBuffer commandBuffer, const VkVideoDecodeInfoKHR
else
radv_vcn_decode_video(cmd_buffer, frame_info);
}
void
radv_video_get_profile_alignments(struct radv_physical_device *pdevice, const VkVideoProfileListInfoKHR *profile_list,
uint32_t *width_align_out, uint32_t *height_align_out)
{
vk_video_get_profile_alignments(profile_list, width_align_out, height_align_out);
bool is_h265_main_10 = false;
for (unsigned i = 0; i < profile_list->profileCount; i++) {
if (profile_list->pProfiles[i].videoCodecOperation == VK_VIDEO_CODEC_OPERATION_DECODE_H265_BIT_KHR) {
const struct VkVideoDecodeH265ProfileInfoKHR *h265_profile =
vk_find_struct_const(profile_list->pProfiles[i].pNext, VIDEO_DECODE_H265_PROFILE_INFO_KHR);
if (h265_profile->stdProfileIdc == STD_VIDEO_H265_PROFILE_IDC_MAIN_10)
is_h265_main_10 = true;
}
}
uint32_t db_alignment = radv_video_get_db_alignment(pdevice, 64, is_h265_main_10);
*width_align_out = MAX2(*width_align_out, db_alignment);
*height_align_out = MAX2(*height_align_out, db_alignment);
}