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lima: ppir: always use vec4 for output register

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gl_FragDepth is a float, but the hardware still uses a vec4 register,
.x component for depth and another component for stencil, so we have to
always allocate a vec4 for output.

Backport-to: 23.3
Backport-to: 24.0
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24855>
(cherry picked from commit b999e41250)
This commit is contained in:
Vasily Khoruzhick 2023-08-23 07:51:57 -07:00 • committed by Eric Engestrom
parent c54a222442
commit 41b3728135
2 changed files with 6 additions and 4 deletions
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2
.pick_status.json
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@ -1434,7 +1434,7 @@
"description": "lima: ppir: always use vec4 for output register",
"nominated": false,
"nomination_type": 3,
"resolution": 4,
"resolution": 1,
"main_sha": null,
"because_sha": null,
"notes": null

8
src/gallium/drivers/lima/ir/pp/nir.c
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@ -403,6 +403,8 @@ static bool ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
default: {
ppir_dest *dest = ppir_node_get_dest(node);
dest->ssa.out_type = out_type;
dest->ssa.num_components = 4;
dest->write_mask = u_bit_consecutive(0, 4);
node->is_out = 1;
return true;
}
@ -415,9 +417,9 @@ static bool ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
ppir_dest *dest = ppir_node_get_dest(&alu_node->node);
dest->type = ppir_target_ssa;
dest->ssa.num_components = instr->num_components;
dest->ssa.num_components = 4;
dest->ssa.index = 0;
dest->write_mask = u_bit_consecutive(0, instr->num_components);
dest->write_mask = u_bit_consecutive(0, 4);
dest->ssa.out_type = out_type;
alu_node->num_src = 1;
@ -427,7 +429,7 @@ static bool ppir_emit_intrinsic(ppir_block *block, nir_instr *ni)
nir_legacy_src legacy_src = nir_legacy_chase_src(instr->src);
ppir_node_add_src(block->comp, &alu_node->node, alu_node->src, &legacy_src,
u_bit_consecutive(0, instr->num_components));
u_bit_consecutive(0, 4));
alu_node->node.is_out = 1;