From 41b0eafc4b0b4ed1083ab00e5fee2a6e0fdfd900 Mon Sep 17 00:00:00 2001 From: Georg Lehmann Date: Wed, 26 Apr 2023 17:44:25 +0200 Subject: [PATCH] aco/ra: convert VOPC_DPP instructions without vcc to VOP3 Reviewed-by: Rhys Perry Part-of: --- src/amd/compiler/aco_register_allocation.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp index 0b360109a08..2e98bb665b9 100644 --- a/src/amd/compiler/aco_register_allocation.cpp +++ b/src/amd/compiler/aco_register_allocation.cpp @@ -3072,20 +3072,20 @@ register_allocation(Program* program, std::vector& live_out_per_block, ra /* some instructions need VOP3 encoding if operand/definition is not assigned to VCC */ bool instr_needs_vop3 = !instr->isVOP3() && - ((instr->format == Format::VOPC && !(instr->definitions[0].physReg() == vcc)) || - (instr->opcode == aco_opcode::v_cndmask_b32 && - !(instr->operands[2].physReg() == vcc)) || + ((withoutDPP(instr->format) == Format::VOPC && + instr->definitions[0].physReg() != vcc) || + (instr->opcode == aco_opcode::v_cndmask_b32 && instr->operands[2].physReg() != vcc) || ((instr->opcode == aco_opcode::v_add_co_u32 || instr->opcode == aco_opcode::v_addc_co_u32 || instr->opcode == aco_opcode::v_sub_co_u32 || instr->opcode == aco_opcode::v_subb_co_u32 || instr->opcode == aco_opcode::v_subrev_co_u32 || instr->opcode == aco_opcode::v_subbrev_co_u32) && - !(instr->definitions[1].physReg() == vcc)) || + instr->definitions[1].physReg() != vcc) || ((instr->opcode == aco_opcode::v_addc_co_u32 || instr->opcode == aco_opcode::v_subb_co_u32 || instr->opcode == aco_opcode::v_subbrev_co_u32) && - !(instr->operands[2].physReg() == vcc))); + instr->operands[2].physReg() != vcc)); if (instr_needs_vop3) { /* if the first operand is a literal, we have to move it to a reg */