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intel/dev: Drop DG1 PAT entries

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It inherents that table from TGL.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29950>
This commit is contained in:
José Roberto de Souza 2024-07-09 06:46:59 -07:00 • committed by Marge Bot
parent 178950bf9b
commit 4173e0f910
1 changed files with 1 additions and 8 deletions
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9
src/intel/dev/intel_device_info.c
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@ -1064,14 +1064,7 @@ static const struct intel_device_info intel_device_info_rpl_p = {
.has_llc = false, \
.has_local_mem = true, \
.urb.size = 768, \
.simulator_id = 30, \
/* There is no PAT table for DG1, using TGL one */ \
.pat = { \
.cached_coherent = PAT_ENTRY(0, WB, 2WAY), \
.scanout = PAT_ENTRY(1, WC, NONE), \
.writeback_incoherent = PAT_ENTRY(0, WB, 2WAY), \
.writecombining = PAT_ENTRY(1, WC, NONE), \
}
.simulator_id = 30
static const struct intel_device_info intel_device_info_dg1 = {
GFX12_DG1_SG1_FEATURES,