mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-03-17 12:30:33 +01:00
nir: Add two new AMD specific tess intrinsics.
These will be needed to implement some tessellation dynamic states within the TCS as opposed to using an epilog. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28408>
This commit is contained in:
parent
8a8fae2520
commit
411de8488c
2 changed files with 6 additions and 0 deletions
|
|
@ -159,6 +159,8 @@ visit_intrinsic(nir_intrinsic_instr *instr, struct divergence_state *state)
|
|||
case nir_intrinsic_load_fb_layers_v3d:
|
||||
case nir_intrinsic_load_fep_w_v3d:
|
||||
case nir_intrinsic_load_tcs_num_patches_amd:
|
||||
case nir_intrinsic_load_tcs_tess_levels_to_tes_amd:
|
||||
case nir_intrinsic_load_tcs_primitive_mode_amd:
|
||||
case nir_intrinsic_load_patch_vertices_in:
|
||||
case nir_intrinsic_load_ring_tess_factors_amd:
|
||||
case nir_intrinsic_load_ring_tess_offchip_amd:
|
||||
|
|
|
|||
|
|
@ -1518,6 +1518,10 @@ system_value("rasterization_primitive_amd", 1);
|
|||
|
||||
# Number of patches processed by each TCS workgroup
|
||||
system_value("tcs_num_patches_amd", 1)
|
||||
# Whether TCS should store tessellation level outputs for TES to read
|
||||
system_value("tcs_tess_levels_to_tes_amd", dest_comp=1, bit_sizes=[1])
|
||||
# Tessellation primitive mode for TCS
|
||||
system_value("tcs_primitive_mode_amd", 1)
|
||||
# Relative tessellation patch ID within the current workgroup
|
||||
system_value("tess_rel_patch_id_amd", 1)
|
||||
# Vertex offsets used for GS per-vertex inputs
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue