From 410de4bf69a0ba92a9ec56ff3d24497bb7adef10 Mon Sep 17 00:00:00 2001 From: Mohamed Ahmed Date: Wed, 21 Feb 2024 19:39:45 +0200 Subject: [PATCH] nak: wire up sparse image loads Part-of: --- src/nouveau/compiler/nak/from_nir.rs | 33 +++++++++++++++++++ .../vulkan/nvk_nir_lower_descriptors.c | 1 + 2 files changed, 34 insertions(+) diff --git a/src/nouveau/compiler/nak/from_nir.rs b/src/nouveau/compiler/nak/from_nir.rs index 51f787a9c68..21f8b11f6fc 100644 --- a/src/nouveau/compiler/nak/from_nir.rs +++ b/src/nouveau/compiler/nak/from_nir.rs @@ -2042,6 +2042,39 @@ impl<'a> ShaderFromNir<'a> { }); self.set_dst(&intrin.def, dst); } + nir_intrinsic_bindless_image_sparse_load => { + let handle = self.get_src(&srcs[0]); + let dim = self.get_image_dim(intrin); + let coord = self.get_image_coord(intrin, dim); + // let sample = self.get_src(&srcs[2]); + + let comps = intrin.num_components; + assert!(intrin.def.bit_size() == 32); + assert!(comps == 5); + + let dst = b.alloc_ssa(RegFile::GPR, comps - 1); + let fault = b.alloc_ssa(RegFile::Pred, 1); + + b.push_op(OpSuLd { + dst: dst.into(), + fault: fault.into(), + image_dim: dim, + mem_order: MemOrder::Strong(MemScope::System), + mem_eviction_priority: self + .get_eviction_priority(intrin.access()), + mask: (1 << (comps - 1)) - 1, + handle: handle, + coord: coord, + }); + + let mut final_dst = Vec::new(); + for i in 0..usize::from(comps) - 1 { + final_dst.push(dst[i]); + } + final_dst.push(b.sel(fault.into(), 0.into(), 1.into())[0]); + + self.set_ssa(&intrin.def, final_dst); + } nir_intrinsic_bindless_image_store => { let handle = self.get_src(&srcs[0]); let dim = self.get_image_dim(intrin); diff --git a/src/nouveau/vulkan/nvk_nir_lower_descriptors.c b/src/nouveau/vulkan/nvk_nir_lower_descriptors.c index 489306d379f..f13779451f9 100644 --- a/src/nouveau/vulkan/nvk_nir_lower_descriptors.c +++ b/src/nouveau/vulkan/nvk_nir_lower_descriptors.c @@ -895,6 +895,7 @@ try_lower_intrin(nir_builder *b, nir_intrinsic_instr *intrin, return lower_sysval_to_root_table(b, intrin, draw.view_index, ctx); case nir_intrinsic_image_deref_load: + case nir_intrinsic_image_deref_sparse_load: case nir_intrinsic_image_deref_store: case nir_intrinsic_image_deref_atomic: case nir_intrinsic_image_deref_atomic_swap: