From 40c2e0a317f2d22f1467a92a0c2008bb57da4028 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tapani=20P=C3=A4lli?= <tapani.palli@intel.com>
Date: Mon, 12 Sep 2022 13:18:39 +0300
Subject: [PATCH] intel/compiler: fix assert from ver to verx10
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Fixes: 027b8b42490 ("intel/compiler: Add helper for barrier message payload setup for gfx >= 125")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18546>
---
 src/intel/compiler/brw_fs_visitor.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_fs_visitor.cpp b/src/intel/compiler/brw_fs_visitor.cpp
index f40c0873dc4..d5fe7df9211 100644
--- a/src/intel/compiler/brw_fs_visitor.cpp
+++ b/src/intel/compiler/brw_fs_visitor.cpp
@@ -1087,7 +1087,7 @@ static void
 setup_barrier_message_payload_gfx125(const fs_builder &bld,
                                      const fs_reg &msg_payload)
 {
-   assert(bld.shader->devinfo->ver >= 125);
+   assert(bld.shader->devinfo->verx10 >= 125);
 
    /* From BSpec: 54006, mov r0.2[31:24] into m0.2[31:24] and m0.2[23:16] */
    fs_reg m0_10ub = component(retype(msg_payload, BRW_REGISTER_TYPE_UB), 10);