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i965/fs: Add support for removing MOV.NZ instructions.
For some reason, we occasionally write the flag register with a MOV.NZ instruction: add(8) g25<1>F -g6<0,1,0>F g15<8,8,1>F cmp.l.f0(8) g26<1>D g25<8,8,1>F 0F mov.nz.f0(8) null g26<8,8,1>D A MOV.NZ instruction on the result of a CMP is like comparing for equality with true in C. It's useless. Removing it allows us to generate: add.l.f0(8) null -g6<0,1,0>F g15<8,8,1>F total instructions in shared programs: 5955701 -> 5951657 (-0.07%) instructions in affected programs: 302910 -> 298866 (-1.34%) GAINED: 1 LOST: 0 Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
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9a3a294224
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2 changed files with 52 additions and 3 deletions
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@ -57,12 +57,20 @@ opt_cmod_propagation_local(fs_visitor *v, bblock_t *block)
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foreach_inst_in_block_reverse_safe(fs_inst, inst, block) {
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foreach_inst_in_block_reverse_safe(fs_inst, inst, block) {
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ip--;
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ip--;
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if (inst->opcode != BRW_OPCODE_CMP ||
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if ((inst->opcode != BRW_OPCODE_CMP &&
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inst->opcode != BRW_OPCODE_MOV) ||
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inst->predicate != BRW_PREDICATE_NONE ||
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inst->predicate != BRW_PREDICATE_NONE ||
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!inst->dst.is_null() ||
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!inst->dst.is_null() ||
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inst->src[0].file != GRF ||
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inst->src[0].file != GRF ||
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inst->src[0].abs ||
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inst->src[0].abs)
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!inst->src[1].is_zero())
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continue;
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if (inst->opcode == BRW_OPCODE_CMP && !inst->src[1].is_zero())
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continue;
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if (inst->opcode == BRW_OPCODE_MOV &&
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(inst->conditional_mod != BRW_CONDITIONAL_NZ ||
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inst->src[0].negate))
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continue;
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continue;
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bool read_flag = false;
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bool read_flag = false;
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@ -73,6 +81,15 @@ opt_cmod_propagation_local(fs_visitor *v, bblock_t *block)
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scan_inst->dst.reg_offset != inst->src[0].reg_offset)
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scan_inst->dst.reg_offset != inst->src[0].reg_offset)
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break;
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break;
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if (inst->opcode == BRW_OPCODE_MOV) {
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if (!scan_inst->writes_flag())
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break;
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inst->remove(block);
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progress = true;
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break;
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}
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enum brw_conditional_mod cond =
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enum brw_conditional_mod cond =
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inst->src[0].negate ? brw_swap_cmod(inst->conditional_mod)
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inst->src[0].negate ? brw_swap_cmod(inst->conditional_mod)
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: inst->conditional_mod;
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: inst->conditional_mod;
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@ -383,3 +383,35 @@ TEST_F(cmod_propagation_test, negate)
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EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
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EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode);
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EXPECT_EQ(BRW_CONDITIONAL_LE, instruction(block0, 0)->conditional_mod);
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EXPECT_EQ(BRW_CONDITIONAL_LE, instruction(block0, 0)->conditional_mod);
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}
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}
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TEST_F(cmod_propagation_test, movnz)
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{
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fs_reg dest = v->vgrf(glsl_type::float_type);
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fs_reg src0 = v->vgrf(glsl_type::float_type);
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fs_reg src1 = v->vgrf(glsl_type::float_type);
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v->emit(BRW_OPCODE_CMP, dest, src0, src1)
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->conditional_mod = BRW_CONDITIONAL_GE;
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v->emit(BRW_OPCODE_MOV, v->reg_null_f, dest)
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->conditional_mod = BRW_CONDITIONAL_NZ;
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/* = Before =
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*
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* 0: cmp.ge.f0(8) dest src0 src1
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* 1: mov.nz.f0(8) null dest
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*
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* = After =
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* 0: cmp.ge.f0(8) dest src0 src1
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*/
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v->calculate_cfg();
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bblock_t *block0 = v->cfg->blocks[0];
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EXPECT_EQ(0, block0->start_ip);
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EXPECT_EQ(1, block0->end_ip);
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EXPECT_TRUE(cmod_propagation(v));
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EXPECT_EQ(0, block0->start_ip);
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EXPECT_EQ(0, block0->end_ip);
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EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode);
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EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod);
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}
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