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aco: remove useless occurences of radv_nir_compiler_options

Browse source 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7061>
This commit is contained in:
Samuel Pitoiset 2020-10-08 10:12:58 +02:00 • committed by Marge Bot
parent 8a6f60fc6b
commit 408195ec53
7 changed files with 16 additions and 20 deletions
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6
src/amd/compiler/aco_interface.cpp
View file

@ -102,8 +102,8 @@ void aco_compile_shader(unsigned shader_count,
validate(program.get());
/* spilling and scheduling */
live_vars = aco::live_var_analysis(program.get(), args->options);
aco::spill(program.get(), live_vars, args->options);
live_vars = aco::live_var_analysis(program.get());
aco::spill(program.get(), live_vars);
}
std::string llvm_ir;
@ -137,7 +137,7 @@ void aco_compile_shader(unsigned shader_count,
aco_print_program(program.get(), stderr);
}
if (aco::validate_ra(program.get(), args->options)) {
if (aco::validate_ra(program.get())) {
std::cerr << "Program after RA validation failure:\n";
aco_print_program(program.get(), stderr);
abort();

9
src/amd/compiler/aco_ir.h
View file

@ -39,7 +39,6 @@
#include "vulkan/radv_shader.h"
struct radv_nir_compiler_options;
struct radv_shader_args;
struct radv_shader_info;
@ -1677,26 +1676,26 @@ void select_trap_handler_shader(Program *program, struct nir_shader *shader,
void lower_phis(Program* program);
void calc_min_waves(Program* program);
void update_vgpr_sgpr_demand(Program* program, const RegisterDemand new_demand);
live live_var_analysis(Program* program, const struct radv_nir_compiler_options *options);
live live_var_analysis(Program* program);
std::vector<uint16_t> dead_code_analysis(Program *program);
void dominator_tree(Program* program);
void insert_exec_mask(Program *program);
void value_numbering(Program* program);
void optimize(Program* program);
void setup_reduce_temp(Program* program);
void lower_to_cssa(Program* program, live& live_vars, const struct radv_nir_compiler_options *options);
void lower_to_cssa(Program* program, live& live_vars);
void register_allocation(Program *program, std::vector<IDSet>& live_out_per_block);
void ssa_elimination(Program* program);
void lower_to_hw_instr(Program* program);
void schedule_program(Program* program, live& live_vars);
void spill(Program* program, live& live_vars, const struct radv_nir_compiler_options *options);
void spill(Program* program, live& live_vars);
void insert_wait_states(Program* program);
void insert_NOPs(Program* program);
unsigned emit_program(Program* program, std::vector<uint32_t>& code);
bool print_asm(Program *program, std::vector<uint32_t>& binary,
unsigned exec_size, std::ostream& out);
bool validate_ir(Program* program);
bool validate_ra(Program* program, const struct radv_nir_compiler_options *options);
bool validate_ra(Program* program);
#ifndef NDEBUG
void perfwarn(Program *program, bool cond, const char *msg, Instruction *instr=NULL);
#else

3
src/amd/compiler/aco_live_var_analysis.cpp
View file

@ -377,8 +377,7 @@ void update_vgpr_sgpr_demand(Program* program, const RegisterDemand new_demand)
}
}
live live_var_analysis(Program* program,
const struct radv_nir_compiler_options *options)
live live_var_analysis(Program* program)
{
live result;
result.live_out.resize(program->blocks.size());

4
src/amd/compiler/aco_lower_to_cssa.cpp
View file

@ -194,7 +194,7 @@ void insert_parallelcopies(cssa_ctx& ctx)
} /* end namespace */
void lower_to_cssa(Program* program, live& live_vars, const struct radv_nir_compiler_options *options)
void lower_to_cssa(Program* program, live& live_vars)
{
cssa_ctx ctx = {program, live_vars};
/* collect information about all interfering phi operands */
@ -206,7 +206,7 @@ void lower_to_cssa(Program* program, live& live_vars, const struct radv_nir_comp
insert_parallelcopies(ctx);
/* update live variable information */
live_vars = live_var_analysis(program, options);
live_vars = live_var_analysis(program);
}
}

4
src/amd/compiler/aco_scheduler.cpp
View file

@ -936,9 +936,7 @@ void schedule_program(Program *program, live& live_vars)
demands[j] = program->blocks[j].register_demand;
}
struct radv_nir_compiler_options options;
options.chip_class = program->chip_class;
live live_vars2 = aco::live_var_analysis(program, &options);
live live_vars2 = aco::live_var_analysis(program);
for (unsigned j = 0; j < program->blocks.size(); j++) {
Block &b = program->blocks[j];

6
src/amd/compiler/aco_spill.cpp
View file

@ -1766,7 +1766,7 @@ void assign_spill_slots(spill_ctx& ctx, unsigned spills_to_vgpr) {
} /* end namespace */
void spill(Program* program, live& live_vars, const struct radv_nir_compiler_options *options)
void spill(Program* program, live& live_vars)
{
program->config->spilled_vgprs = 0;
program->config->spilled_sgprs = 0;
@ -1776,7 +1776,7 @@ void spill(Program* program, live& live_vars, const struct radv_nir_compiler_opt
return;
/* lower to CSSA before spilling to ensure correctness w.r.t. phis */
lower_to_cssa(program, live_vars, options);
lower_to_cssa(program, live_vars);
/* calculate target register demand */
RegisterDemand register_target = program->max_reg_demand;
@ -1802,7 +1802,7 @@ void spill(Program* program, live& live_vars, const struct radv_nir_compiler_opt
assign_spill_slots(ctx, spills_to_vgpr);
/* update live variable information */
live_vars = live_var_analysis(program, options);
live_vars = live_var_analysis(program);
assert(program->num_waves > 0);
}

4
src/amd/compiler/aco_validate.cpp
View file

@ -664,12 +664,12 @@ unsigned get_subdword_bytes_written(Program *program, const aco_ptr<Instruction>
} /* end namespace */
bool validate_ra(Program *program, const struct radv_nir_compiler_options *options) {
bool validate_ra(Program *program) {
if (!(debug_flags & DEBUG_VALIDATE_RA))
return false;
bool err = false;
aco::live live_vars = aco::live_var_analysis(program, options);
aco::live live_vars = aco::live_var_analysis(program);
std::vector<std::vector<Temp>> phi_sgpr_ops(program->blocks.size());
std::map<unsigned, Assignment> assignments;