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radeonsi: don't flush sL1 conditionally in WAIT_ON_CE_COUNTER

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I don't know the condition for the flush, but we better turn this off.
The sL1 flush is used when CE dumps stuff into a ring buffer and the ring
buffer wraps.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2017-07-29 22:03:38 +02:00
parent 94965b8219
commit 404f524fe2
1 changed files with 3 additions and 3 deletions
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6
src/gallium/drivers/radeonsi/si_state_draw.c
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@ -1145,10 +1145,10 @@ void si_ce_pre_draw_synchronization(struct si_context *sctx)
{
if (sctx->ce_need_synchronization) {
radeon_emit(sctx->ce_ib, PKT3(PKT3_INCREMENT_CE_COUNTER, 0, 0));
radeon_emit(sctx->ce_ib, 1);
radeon_emit(sctx->ce_ib, 1); /* 1 = increment CE counter */
radeon_emit(sctx->b.gfx.cs, PKT3(PKT3_WAIT_ON_CE_COUNTER, 0, 0));
radeon_emit(sctx->b.gfx.cs, 1);
radeon_emit(sctx->b.gfx.cs, 0); /* 0 = don't flush sL1 conditionally */
}
}
@ -1156,7 +1156,7 @@ void si_ce_post_draw_synchronization(struct si_context *sctx)
{
if (sctx->ce_need_synchronization) {
radeon_emit(sctx->b.gfx.cs, PKT3(PKT3_INCREMENT_DE_COUNTER, 0, 0));
radeon_emit(sctx->b.gfx.cs, 0);
radeon_emit(sctx->b.gfx.cs, 0); /* unused */
sctx->ce_need_synchronization = false;
}