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radeonsi/vcn: Always enable decode tier2 when supported
This enables tier2 for VDPAU H264/5. Reviewed-by: Ruijing Dong <ruijing.dong@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36462>
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8d93684694
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4011344bc9
1 changed files with 28 additions and 7 deletions
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@ -2758,6 +2758,31 @@ static void radeon_dec_destroy_fence(struct pipe_video_codec *decoder,
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dec->ws->fence_reference(dec->ws, &fence, NULL);
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}
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static bool radeon_dec_enable_tier3(struct si_context *sctx, uint32_t codec)
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{
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if (sctx->vcn_ip_ver < VCN_5_0_0)
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return false;
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return true;
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}
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static bool radeon_dec_enable_tier2(struct si_context *sctx, uint32_t codec)
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{
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if (sctx->vcn_ip_ver < VCN_3_0_0)
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return false;
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return codec == RDECODE_CODEC_VP9 || codec == RDECODE_CODEC_AV1 ||
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codec == RDECODE_CODEC_H265 || codec == RDECODE_CODEC_H264_PERF;
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}
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static bool radeon_dec_enable_tier1(struct si_context *sctx, uint32_t codec)
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{
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if (sctx->vcn_ip_ver > VCN_2_6_0)
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return false;
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return codec == RDECODE_CODEC_VP9;
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}
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/**
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* create and HW decoder
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*/
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@ -2937,15 +2962,11 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
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}
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}
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if (sctx->vcn_ip_ver >= VCN_5_0_0)
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if (radeon_dec_enable_tier3(sctx, stream_type))
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dec->dpb_type = DPB_DYNAMIC_TIER_3;
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else if ((sctx->vcn_ip_ver >= VCN_3_0_0) &&
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(stream_type == RDECODE_CODEC_VP9 ||
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stream_type == RDECODE_CODEC_AV1 ||
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((stream_type == RDECODE_CODEC_H265) && templ->expect_chunked_decode) ||
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((stream_type == RDECODE_CODEC_H264_PERF) && templ->expect_chunked_decode)))
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else if (radeon_dec_enable_tier2(sctx, stream_type))
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dec->dpb_type = DPB_DYNAMIC_TIER_2;
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else if (sctx->vcn_ip_ver <= VCN_2_6_0 && stream_type == RDECODE_CODEC_VP9)
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else if (radeon_dec_enable_tier1(sctx, stream_type))
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dec->dpb_type = DPB_DYNAMIC_TIER_1;
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else
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dec->dpb_type = DPB_MAX_RES;
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