From 3fad6325cd4ddd09bee833f3a6e48bc63f9ef52e Mon Sep 17 00:00:00 2001
From: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Date: Mon, 7 Feb 2022 18:46:23 +0100
Subject: [PATCH] radeonsi: use SI_PROFILE_CLAMP_DIV_BY_ZERO for viewperf
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Only one shader from the Creo subtests needs this.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14931>
---
 src/gallium/drivers/radeonsi/si_shader_info.c | 5 +++++
 src/util/00-mesa-defaults.conf                | 1 -
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader_info.c b/src/gallium/drivers/radeonsi/si_shader_info.c
index 28cec312279..f34dcc45ce0 100644
--- a/src/gallium/drivers/radeonsi/si_shader_info.c
+++ b/src/gallium/drivers/radeonsi/si_shader_info.c
@@ -55,6 +55,11 @@ static struct si_shader_profile profiles[] =
       {0x29f0f4a0, 0x0672258d, 0x47ccdcfd, 0x31e67dcc, 0xdcb1fda8},
       SI_PROFILE_WAVE64,
    },
+   {
+      /* Viewperf/Creo */
+      {0x1f288a73, 0xba46cce5, 0xbf68e6c6, 0x58543651, 0xca3c8efd},
+      SI_PROFILE_CLAMP_DIV_BY_ZERO,
+   },
 };
 
 static unsigned get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
diff --git a/src/util/00-mesa-defaults.conf b/src/util/00-mesa-defaults.conf
index 7f3aed459a8..02db93163b9 100644
--- a/src/util/00-mesa-defaults.conf
+++ b/src/util/00-mesa-defaults.conf
@@ -856,7 +856,6 @@ TODO: document the other workarounds.
         <application name="SPECviewperf13" executable="viewperf">
             <option name="glthread_nop_check_framebuffer_status" value="true" />
             <option name="radeonsi_sync_compile" value="true" />
-            <option name="radeonsi_clamp_div_by_zero" value="true" />
             <option name="radeonsi_tc_max_cpu_storage_size" value="2500" />
         </application>
         <application name="Road Redemption" executable="RoadRedemption.x86_64">