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pan/midg: Fix swizzle packing on 64bit instructions with src-expansion + dst-shrinking

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In that case, the mask is specified on 32bit lanes, so we need to shift
it if it's > 0x3. The expand modifier will take care of selecting the
right side of the 32bit vector.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14885>
This commit is contained in:
Boris Brezillon 2021-09-09 10:38:20 +02:00 • committed by Alyssa Rosenzweig
parent da474d5d14
commit 3f9bce08e1
1 changed files with 6 additions and 0 deletions
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6
src/panfrost/midgard/midgard_emit.c
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@ -244,6 +244,12 @@ mir_pack_swizzle(unsigned mask, unsigned *swizzle,
bool lo = swizzle[0] >= COMPONENT_Z;
bool hi = swizzle[1] >= COMPONENT_Z;
assert(!(mask & ~0xf));
assert(!(mask & 0x3) || !(mask & 0xc));
if (mask > 3)
mask >>= 2;
if (mask & 0x1) {
/* We can't mix halves... */
if (mask & 2)