From 3f5449f049dbc26877e6fffcd1ac95ac2d41fd03 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marcin=20=C5=9Alusarz?= Date: Thu, 14 Oct 2021 13:22:08 +0200 Subject: [PATCH] iris: fix scratch address patching for TESS_EVAL stage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Scratch patching code in iris_upload_dirty_render_state (see MERGE_SCRATCH_ADDR calls) assumes that in all shader stages derived_data field stores 3DSTATE_XS packet first. This is not true for TESS_EVAL (DS), so we end up patching 3DSTATE_TE instead of 3DSTATE_DS leading to DWordLength becoming 11 instead of 9 (9 == 3DSTATE_DS.DWordLength, 2 == 3DSTATE_TE.DWordLength, and 9|2 == 11), and hardware hanging on the next instruction. Fix this by reversing the order of packets for TESS_EVAL stage. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5499 Fixes: 4256f7ed584 ("iris: Fill out scratch base address dynamically") Signed-off-by: Marcin Ĺšlusarz Reviewed-by: Kenneth Graunke Part-of: (cherry picked from commit 5387522bd00147f298e5799db41db94f9a4a37e3) --- .pick_status.json | 2 +- src/gallium/drivers/iris/iris_state.c | 21 ++++++++++----------- 2 files changed, 11 insertions(+), 12 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 58dc8595676..b951a44d61b 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -310,7 +310,7 @@ "description": "iris: fix scratch address patching for TESS_EVAL stage", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "4256f7ed5847505c30e903b6674dac88c5d03315" }, diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index de04c11f093..934870d6710 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -4384,17 +4384,8 @@ iris_store_tes_state(const struct intel_device_info *devinfo, struct brw_vue_prog_data *vue_prog_data = (void *) prog_data; struct brw_tes_prog_data *tes_prog_data = (void *) prog_data; - uint32_t *te_state = (void *) shader->derived_data; - uint32_t *ds_state = te_state + GENX(3DSTATE_TE_length); - - iris_pack_command(GENX(3DSTATE_TE), te_state, te) { - te.Partitioning = tes_prog_data->partitioning; - te.OutputTopology = tes_prog_data->output_topology; - te.TEDomain = tes_prog_data->domain; - te.TEEnable = true; - te.MaximumTessellationFactorOdd = 63.0; - te.MaximumTessellationFactorNotOdd = 64.0; - } + uint32_t *ds_state = (void *) shader->derived_data; + uint32_t *te_state = ds_state + GENX(3DSTATE_DS_length); iris_pack_command(GENX(3DSTATE_DS), ds_state, ds) { INIT_THREAD_DISPATCH_FIELDS(ds, Patch, MESA_SHADER_TESS_EVAL); @@ -4408,6 +4399,14 @@ iris_store_tes_state(const struct intel_device_info *devinfo, vue_prog_data->cull_distance_mask; } + iris_pack_command(GENX(3DSTATE_TE), te_state, te) { + te.Partitioning = tes_prog_data->partitioning; + te.OutputTopology = tes_prog_data->output_topology; + te.TEDomain = tes_prog_data->domain; + te.TEEnable = true; + te.MaximumTessellationFactorOdd = 63.0; + te.MaximumTessellationFactorNotOdd = 64.0; + } } /**