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r600g: initial alpha test state
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parent
7bcd39ce50
commit
3f4ec394b0
1 changed files with 13 additions and 5 deletions
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@ -873,19 +873,27 @@ static struct radeon_state *r600_dsa(struct r600_context *rctx)
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const struct pipe_depth_stencil_alpha_state *state = &rctx->dsa->state.dsa;
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struct r600_screen *rscreen = rctx->screen;
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struct radeon_state *rstate;
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unsigned db_depth_control;
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unsigned db_depth_control, alpha_test_control, alpha_ref;
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rstate = radeon_state(rscreen->rw, R600_DSA_TYPE, R600_DSA);
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if (rstate == NULL)
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return NULL;
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db_depth_control = 0x00700700 | S_028800_Z_ENABLE(state->depth.enabled) | S_028800_Z_WRITE_ENABLE(state->depth.writemask) | S_028800_ZFUNC(state->depth.func);
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alpha_test_control = 0;
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alpha_ref = 0;
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if (state->alpha.enabled) {
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alpha_test_control = (state->alpha.func) << 0;
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alpha_test_control |= SX_ALPHA_TEST_ENABLE;
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alpha_ref = fui(state->alpha.ref_value);
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}
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rstate->states[R600_DSA__DB_STENCIL_CLEAR] = 0x00000000;
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rstate->states[R600_DSA__DB_DEPTH_CLEAR] = 0x3F800000;
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rstate->states[R600_DSA__SX_ALPHA_TEST_CONTROL] = 0x00000000;
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rstate->states[R600_DSA__SX_ALPHA_TEST_CONTROL] = alpha_test_control;
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rstate->states[R600_DSA__DB_STENCILREFMASK] = 0xFFFFFF00;
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rstate->states[R600_DSA__DB_STENCILREFMASK_BF] = 0xFFFFFF00;
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rstate->states[R600_DSA__SX_ALPHA_REF] = 0x00000000;
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rstate->states[R600_DSA__SX_ALPHA_REF] = alpha_ref;
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rstate->states[R600_DSA__SPI_FOG_FUNC_SCALE] = 0x00000000;
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rstate->states[R600_DSA__SPI_FOG_FUNC_BIAS] = 0x00000000;
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rstate->states[R600_DSA__SPI_FOG_CNTL] = 0x00000000;
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