diff --git a/.pick_status.json b/.pick_status.json
index 115accb6ebc..323bd822d83 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -9886,7 +9886,7 @@
         "description": "radv: fix 16-bit support in radv_lower_vs_input",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "b366fef091d33e7d5307f292b2320267c841e350"
     },
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 2407bd6e3d8..5490e159cea 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -4241,9 +4241,10 @@ radv_lower_vs_input(nir_shader *nir, const struct radv_pipeline_key *pipeline_ke
             if (swizzle[i + component] < num_channels) {
                channels[i] = nir_channel(&b, &intrin->dest.ssa, swizzle[idx]);
             } else if (i + component == 3) {
-               channels[i] = is_float ? nir_imm_float(&b, 1.0f) : nir_imm_int(&b, 1u);
+               channels[i] = is_float ? nir_imm_floatN_t(&b, 1.0f, intrin->dest.ssa.bit_size)
+                                      : nir_imm_intN_t(&b, 1u, intrin->dest.ssa.bit_size);
             } else {
-               channels[i] = nir_imm_zero(&b, 1, 32);
+               channels[i] = nir_imm_zero(&b, 1, intrin->dest.ssa.bit_size);
             }
          }