From 3f36e027d37e28af08b91019df4bf3cdf08bfa2f Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Mon, 3 May 2021 13:59:30 -0500 Subject: [PATCH] intel/fs: Don't use pixel_z for Gen4-5 source_depth_to_render_target The source_depth_to_render_target flag can get set on old gen4-5 HW in a few cases which are independent of the app writing gl_FragDepth. It should be safe to just use fetch_payload_reg in that case instead of depending in interpolation setup. This fixes a bug with certain very simple shaders where we might end up not including the depth when we should have. While we're here, rework the logic around setting src_depth and add a comment so it's more clear what's going on. Fixes: 6d4070f3ddb5 "intel/compiler: add support for fragment coordinate..." Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/compiler/brw_fs_visitor.cpp | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/src/intel/compiler/brw_fs_visitor.cpp b/src/intel/compiler/brw_fs_visitor.cpp index 18148e97fe4..b58ec72e465 100644 --- a/src/intel/compiler/brw_fs_visitor.cpp +++ b/src/intel/compiler/brw_fs_visitor.cpp @@ -613,11 +613,18 @@ fs_visitor::emit_single_fb_write(const fs_builder &bld, const fs_reg dst_depth = fetch_payload_reg(bld, payload.dest_depth_reg); fs_reg src_depth, src_stencil; - if (source_depth_to_render_target) { - if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) - src_depth = frag_depth; - else - src_depth = this->pixel_z; + if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) { + src_depth = frag_depth; + } else if (source_depth_to_render_target) { + /* If we got here, we're in one of those strange Gen4-5 cases where + * we're forced to pass the source depth, unmodified, to the FB write. + * In this case, we don't want to use pixel_z because we may not have + * set up interpolation. It's also perfectly safe because it only + * happens on old hardware (no coarse interpolation) and this is + * explicitly the pass-through case. + */ + assert(devinfo->ver <= 5); + src_depth = fetch_payload_reg(bld, payload.source_depth_reg); } if (nir->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL))