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ac/llvm: fix build with LLVM 17

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This builds with LLVM 12 -> 17 and a running a simple app seems to work.

I couldn't test LLVM 11 because meson fails with:

    Looking for a fallback subproject for the dependency llvm (modules:
    bitwriter, engine, mcdisassembler, mcjit, core, executionengine,
    scalaropts, transformutils, instcombine, amdgpu, bitreader, ipo, native)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8297
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22021>
This commit is contained in:
Pierre-Eric Pelloux-Prayer 2023-03-20 10:26:11 +01:00 • committed by Marge Bot
parent 4659a94cfe
commit 3f272fd15e
4 changed files with 45 additions and 51 deletions
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2
src/amd/llvm/ac_llvm_build.h
View file

@ -586,8 +586,6 @@ LLVMValueRef ac_build_atomic_rmw(struct ac_llvm_context *ctx, LLVMAtomicRMWBinOp
LLVMValueRef ac_build_atomic_cmp_xchg(struct ac_llvm_context *ctx, LLVMValueRef ptr, LLVMValueRef ac_build_atomic_cmp_xchg(struct ac_llvm_context *ctx, LLVMValueRef ptr,
LLVMValueRef cmp, LLVMValueRef val, const char *sync_scope); LLVMValueRef cmp, LLVMValueRef val, const char *sync_scope);
void ac_add_sinking_pass(LLVMPassManagerRef PM);
void ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth, LLVMValueRef stencil, void ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth, LLVMValueRef stencil,
LLVMValueRef samplemask, LLVMValueRef mrt0_alpha, bool is_last, LLVMValueRef samplemask, LLVMValueRef mrt0_alpha, bool is_last,
struct ac_export_args *args); struct ac_export_args *args);

50
src/amd/llvm/ac_llvm_helper.cpp
View file

@ -32,7 +32,11 @@
#include <llvm/Support/CommandLine.h> #include <llvm/Support/CommandLine.h>
#include <llvm/Transforms/IPO.h> #include <llvm/Transforms/IPO.h>
#include <llvm/Transforms/Scalar.h> #include <llvm/Transforms/Scalar.h>
#include <llvm/Transforms/Utils.h>
#include <llvm/CodeGen/Passes.h>
#include <llvm/Transforms/IPO/AlwaysInliner.h>
#include <llvm/Transforms/InstCombine/InstCombine.h>
#include <llvm/Transforms/IPO/SCCP.h>
#if LLVM_VERSION_MAJOR >= 15 #if LLVM_VERSION_MAJOR >= 15
#include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/CodeGen/SelectionDAGNodes.h"
#endif #endif
@ -292,9 +296,46 @@ bool ac_compile_module_to_elf(struct ac_compiler_passes *p, LLVMModuleRef module
return true; return true;
} }
void ac_llvm_add_barrier_noop_pass(LLVMPassManagerRef passmgr) LLVMPassManagerRef ac_create_passmgr(LLVMTargetLibraryInfoRef target_library_info,
bool check_ir)
{ {
LLVMPassManagerRef passmgr = LLVMCreatePassManager();
if (!passmgr)
return NULL;
if (target_library_info)
LLVMAddTargetLibraryInfo(target_library_info, passmgr);
if (check_ir)
unwrap(passmgr)->add(createMachineVerifierPass("mesa ir"));
unwrap(passmgr)->add(createAlwaysInlinerLegacyPass());
/* Normally, the pass manager runs all passes on one function before
* moving onto another. Adding a barrier no-op pass forces the pass
* manager to run the inliner on all functions first, which makes sure
* that the following passes are only run on the remaining non-inline
* function, so it removes useless work done on dead inline functions.
*/
unwrap(passmgr)->add(createBarrierNoopPass()); unwrap(passmgr)->add(createBarrierNoopPass());
/* This pass eliminates all loads and stores on alloca'd pointers. */
unwrap(passmgr)->add(createPromoteMemoryToRegisterPass());
#if LLVM_VERSION_MAJOR >= 16
unwrap(passmgr)->add(createSROAPass(true));
#else
unwrap(passmgr)->add(createSROAPass());
#endif
/* TODO: restore IPSCCP */
if (LLVM_VERSION_MAJOR >= 16)
unwrap(passmgr)->add(createLoopSinkPass());
/* TODO: restore IPSCCP */
unwrap(passmgr)->add(createLICMPass());
unwrap(passmgr)->add(createCFGSimplificationPass());
/* This is recommended by the instruction combining pass. */
unwrap(passmgr)->add(createEarlyCSEPass(true));
unwrap(passmgr)->add(createInstructionCombiningPass());
return passmgr;
} }
LLVMValueRef ac_build_atomic_rmw(struct ac_llvm_context *ctx, LLVMAtomicRMWBinOp op, LLVMValueRef ac_build_atomic_rmw(struct ac_llvm_context *ctx, LLVMAtomicRMWBinOp op,
@ -364,8 +405,3 @@ LLVMValueRef ac_build_atomic_cmp_xchg(struct ac_llvm_context *ctx, LLVMValueRef
AtomicOrdering::SequentiallyConsistent, AtomicOrdering::SequentiallyConsistent,
AtomicOrdering::SequentiallyConsistent, SSID)); AtomicOrdering::SequentiallyConsistent, SSID));
} }
void ac_add_sinking_pass(LLVMPassManagerRef PM)
{
unwrap(PM)->add(createLoopSinkPass());
}

41
src/amd/llvm/ac_llvm_util.c
View file

@ -31,9 +31,6 @@
#include "util/u_math.h" #include "util/u_math.h"
#include <llvm-c/Core.h> #include <llvm-c/Core.h>
#include <llvm-c/Support.h> #include <llvm-c/Support.h>
#include <llvm-c/Transforms/IPO.h>
#include <llvm-c/Transforms/Scalar.h>
#include <llvm-c/Transforms/Utils.h>
#include <assert.h> #include <assert.h>
#include <stdio.h> #include <stdio.h>
@ -219,44 +216,6 @@ static LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family,
return tm; return tm;
} }
static LLVMPassManagerRef ac_create_passmgr(LLVMTargetLibraryInfoRef target_library_info,
bool check_ir)
{
LLVMPassManagerRef passmgr = LLVMCreatePassManager();
if (!passmgr)
return NULL;
if (target_library_info)
LLVMAddTargetLibraryInfo(target_library_info, passmgr);
if (check_ir)
LLVMAddVerifierPass(passmgr);
LLVMAddAlwaysInlinerPass(passmgr);
/* Normally, the pass manager runs all passes on one function before
* moving onto another. Adding a barrier no-op pass forces the pass
* manager to run the inliner on all functions first, which makes sure
* that the following passes are only run on the remaining non-inline
* function, so it removes useless work done on dead inline functions.
*/
ac_llvm_add_barrier_noop_pass(passmgr);
/* This pass eliminates all loads and stores on alloca'd pointers. */
LLVMAddPromoteMemoryToRegisterPass(passmgr);
LLVMAddScalarReplAggregatesPass(passmgr);
LLVMAddIPSCCPPass(passmgr);
if (LLVM_VERSION_MAJOR >= 16)
ac_add_sinking_pass(passmgr);
LLVMAddLICMPass(passmgr);
LLVMAddAggressiveDCEPass(passmgr);
LLVMAddCFGSimplificationPass(passmgr);
/* This is recommended by the instruction combining pass. */
LLVMAddEarlyCSEMemSSAPass(passmgr);
LLVMAddInstructionCombiningPass(passmgr);
return passmgr;
}
LLVMAttributeRef ac_get_llvm_attribute(LLVMContextRef ctx, const char *str) LLVMAttributeRef ac_get_llvm_attribute(LLVMContextRef ctx, const char *str)
{ {
return LLVMCreateEnumAttribute(ctx, LLVMGetEnumAttributeKindForName(str, strlen(str)), 0); return LLVMCreateEnumAttribute(ctx, LLVMGetEnumAttributeKindForName(str, strlen(str)), 0);

3
src/amd/llvm/ac_llvm_util.h
View file

@ -110,7 +110,8 @@ struct ac_compiler_passes *ac_create_llvm_passes(LLVMTargetMachineRef tm);
void ac_destroy_llvm_passes(struct ac_compiler_passes *p); void ac_destroy_llvm_passes(struct ac_compiler_passes *p);
bool ac_compile_module_to_elf(struct ac_compiler_passes *p, LLVMModuleRef module, bool ac_compile_module_to_elf(struct ac_compiler_passes *p, LLVMModuleRef module,
char **pelf_buffer, size_t *pelf_size); char **pelf_buffer, size_t *pelf_size);
void ac_llvm_add_barrier_noop_pass(LLVMPassManagerRef passmgr); LLVMPassManagerRef ac_create_passmgr(LLVMTargetLibraryInfoRef target_library_info,
bool check_ir);
static inline bool ac_has_vec3_support(enum amd_gfx_level chip, bool use_format) static inline bool ac_has_vec3_support(enum amd_gfx_level chip, bool use_format)
{ {