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vc4: Add missing load_ubo set_align in yuv_blit fs.

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Fixes: e78a7a1825 ("nir: Assert memory loads are aligned")
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7160>
(cherry picked from commit 4cfdd425b6)
This commit is contained in:
Jose Maria Casanova Crespo 2020-10-15 13:22:28 +02:00 • committed by Dylan Baker
parent ca34f519ec
commit 3f1601a1e3
2 changed files with 2 additions and 1 deletions
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2
.pick_status.json
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@ -112,7 +112,7 @@
"description": "vc4: Add missing load_ubo set_align in yuv_blit fs.",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"master_sha": null,
"because_sha": "e78a7a182524f091e2d77ba97bfbe057c3975cab"
},

1
src/gallium/drivers/vc4/vc4_blit.c
View file

@ -299,6 +299,7 @@ static void *vc4_get_yuv_fs(struct pipe_context *pctx, int cpp)
nir_ssa_dest_init(&load->instr, &load->dest, load->num_components, 32, NULL);
load->src[0] = nir_src_for_ssa(one);
load->src[1] = nir_src_for_ssa(nir_iadd(&b, x_offset, y_offset));
nir_intrinsic_set_align(load, 4, 0);
nir_builder_instr_insert(&b, &load->instr);
nir_store_var(&b, color_out,