diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index b41c9b8f3e3..68e6cf79f61 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -3668,11 +3668,11 @@ radv_flush_streamout_descriptors(struct radv_cmd_buffer *cmd_buffer)
 }
 
 static void
-radv_flush_ngg_gs_state(struct radv_cmd_buffer *cmd_buffer)
+radv_flush_ngg_query_state(struct radv_cmd_buffer *cmd_buffer)
 {
    struct radv_graphics_pipeline *pipeline = cmd_buffer->state.graphics_pipeline;
    struct radv_userdata_info *loc;
-   uint32_t ngg_gs_state = 0;
+   uint32_t ngg_query_state = 0;
    uint32_t base_reg;
 
    if (!radv_pipeline_has_stage(pipeline, MESA_SHADER_GEOMETRY) || !pipeline->is_ngg)
@@ -3685,13 +3685,13 @@ radv_flush_ngg_gs_state(struct radv_cmd_buffer *cmd_buffer)
    if (cmd_buffer->state.active_pipeline_gds_queries ||
        (cmd_buffer->state.inherited_pipeline_statistics &
         VK_QUERY_PIPELINE_STATISTIC_GEOMETRY_SHADER_PRIMITIVES_BIT))
-      ngg_gs_state = 1;
+      ngg_query_state = 1;
 
-   loc = radv_lookup_user_sgpr(&pipeline->base, MESA_SHADER_GEOMETRY, AC_UD_NGG_GS_STATE);
+   loc = radv_lookup_user_sgpr(&pipeline->base, MESA_SHADER_GEOMETRY, AC_UD_NGG_QUERY_STATE);
    base_reg = pipeline->base.user_data_0[MESA_SHADER_GEOMETRY];
    assert(loc->sgpr_idx != -1);
 
-   radeon_set_sh_reg(cmd_buffer->cs, base_reg + loc->sgpr_idx * 4, ngg_gs_state);
+   radeon_set_sh_reg(cmd_buffer->cs, base_reg + loc->sgpr_idx * 4, ngg_query_state);
 }
 
 static void
@@ -3749,7 +3749,7 @@ radv_upload_graphics_shader_descriptors(struct radv_cmd_buffer *cmd_buffer, bool
    VkShaderStageFlags stages = VK_SHADER_STAGE_ALL_GRAPHICS | VK_SHADER_STAGE_MESH_BIT_NV;
    radv_flush_descriptors(cmd_buffer, stages, &pipeline->base, VK_PIPELINE_BIND_POINT_GRAPHICS);
    radv_flush_constants(cmd_buffer, stages, &pipeline->base, VK_PIPELINE_BIND_POINT_GRAPHICS);
-   radv_flush_ngg_gs_state(cmd_buffer);
+   radv_flush_ngg_query_state(cmd_buffer);
    radv_flush_force_vrs_state(cmd_buffer);
 }
 
diff --git a/src/amd/vulkan/radv_nir_lower_abi.c b/src/amd/vulkan/radv_nir_lower_abi.c
index 7b6231114c4..3aac76bf566 100644
--- a/src/amd/vulkan/radv_nir_lower_abi.c
+++ b/src/amd/vulkan/radv_nir_lower_abi.c
@@ -127,7 +127,7 @@ lower_abi_instr(nir_builder *b, nir_instr *instr, void *state)
       return ac_nir_load_arg(b, &s->args->ac, s->args->ac.gs_vtx_offset[0]);
 
    case nir_intrinsic_load_shader_query_enabled_amd:
-      return nir_ieq_imm(b, ac_nir_load_arg(b, &s->args->ac, s->args->ngg_gs_state), 1);
+      return nir_ieq_imm(b, ac_nir_load_arg(b, &s->args->ac, s->args->ngg_query_state), 1);
 
    case nir_intrinsic_load_cull_any_enabled_amd:
       return nggc_bool_setting(b, radv_nggc_front_face | radv_nggc_back_face | radv_nggc_small_primitives, s);
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 6c6fd1c685b..8a5c2d783e0 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -1454,7 +1454,7 @@ gfx10_ngg_gs_emit_epilogue_2(struct radv_shader_context *ctx)
    LLVMValueRef num_emit_threads = ngg_get_prim_cnt(ctx);
 
    /* Write shader query data. */
-   tmp = ac_get_arg(&ctx->ac, ctx->args->ngg_gs_state);
+   tmp = ac_get_arg(&ctx->ac, ctx->args->ngg_query_state);
    tmp = LLVMBuildTrunc(builder, tmp, ctx->ac.i1, "");
    ac_build_ifcc(&ctx->ac, tmp, 5109);
    tmp = LLVMBuildICmp(builder, LLVMIntULT, tid, LLVMConstInt(ctx->ac.i32, 4, false), "");
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index fbd43140184..a6414bd4483 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -143,7 +143,7 @@ enum radv_ud_index {
    AC_UD_INDIRECT_DESCRIPTOR_SETS = 3,
    AC_UD_VIEW_INDEX = 4,
    AC_UD_STREAMOUT_BUFFERS = 5,
-   AC_UD_NGG_GS_STATE = 6,
+   AC_UD_NGG_QUERY_STATE = 6,
    AC_UD_NGG_CULLING_SETTINGS = 7,
    AC_UD_NGG_VIEWPORT = 8,
    AC_UD_FORCE_VRS_RATES = 9,
diff --git a/src/amd/vulkan/radv_shader_args.c b/src/amd/vulkan/radv_shader_args.c
index 749989300fe..42561db6d7c 100644
--- a/src/amd/vulkan/radv_shader_args.c
+++ b/src/amd/vulkan/radv_shader_args.c
@@ -109,7 +109,7 @@ count_ngg_sgprs(const struct radv_shader_info *info, bool has_api_gs)
    unsigned count = 0;
 
    if (has_api_gs)
-      count += 1; /* ngg_gs_state */
+      count += 1; /* ngg_query_state */
    if (info->has_ngg_culling)
       count += 5; /* ngg_culling_settings + 4x ngg_viewport_* */
 
@@ -453,7 +453,7 @@ declare_ngg_sgprs(const struct radv_shader_info *info, struct radv_shader_args *
                   bool has_api_gs)
 {
    if (has_api_gs) {
-      ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_gs_state);
+      ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_query_state);
    }
 
    if (info->has_ngg_culling) {
@@ -860,8 +860,8 @@ radv_declare_shader_args(enum amd_gfx_level gfx_level, const struct radv_pipelin
       if (args->ac.force_vrs_rates.used)
          set_loc_shader(args, AC_UD_FORCE_VRS_RATES, &user_sgpr_idx, 1);
 
-      if (args->ngg_gs_state.used) {
-         set_loc_shader(args, AC_UD_NGG_GS_STATE, &user_sgpr_idx, 1);
+      if (args->ngg_query_state.used) {
+         set_loc_shader(args, AC_UD_NGG_QUERY_STATE, &user_sgpr_idx, 1);
       }
 
       if (args->ngg_culling_settings.used) {
diff --git a/src/amd/vulkan/radv_shader_args.h b/src/amd/vulkan/radv_shader_args.h
index d79dce94f76..0d373719d71 100644
--- a/src/amd/vulkan/radv_shader_args.h
+++ b/src/amd/vulkan/radv_shader_args.h
@@ -44,8 +44,10 @@ struct radv_shader_args {
    /* Streamout */
    struct ac_arg streamout_buffers;
 
+   /* NGG */
+   struct ac_arg ngg_query_state;
+
    /* NGG GS */
-   struct ac_arg ngg_gs_state;
    struct ac_arg ngg_culling_settings;
    struct ac_arg ngg_viewport_scale[2];
    struct ac_arg ngg_viewport_translate[2];