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https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-01-29 22:30:24 +01:00
gallivm/nir: add tessellation i/o support.
This add support for the tessellation i/o callbacks. Tessellation requires another level of indirect indexing, and allows fetches from shader outputs. Reviewed-by: Roland Scheidegger <sroland@vmware.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3841>
This commit is contained in:
Dave Airlie
parent
70a7603b63
commit
3ecd496117
3 changed files with 174 additions and 11 deletions
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@ -946,6 +946,7 @@ static void visit_load_var(struct lp_build_nir_context *bld_base,
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nir_variable_mode mode = deref->mode;
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unsigned const_index;
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LLVMValueRef indir_index;
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LLVMValueRef indir_vertex_index = NULL;
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unsigned vertex_index = 0;
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unsigned nc = nir_dest_num_components(instr->dest);
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unsigned bit_size = nir_dest_bit_size(instr->dest);
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@ -954,12 +955,19 @@ static void visit_load_var(struct lp_build_nir_context *bld_base,
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var->data.mode == nir_var_shader_in;
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bool gs_in = bld_base->shader->info.stage == MESA_SHADER_GEOMETRY &&
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var->data.mode == nir_var_shader_in;
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bool tcs_in = bld_base->shader->info.stage == MESA_SHADER_TESS_CTRL &&
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var->data.mode == nir_var_shader_in;
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bool tcs_out = bld_base->shader->info.stage == MESA_SHADER_TESS_CTRL &&
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var->data.mode == nir_var_shader_out && !var->data.patch;
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bool tes_in = bld_base->shader->info.stage == MESA_SHADER_TESS_EVAL &&
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var->data.mode == nir_var_shader_in && !var->data.patch;
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mode = var->data.mode;
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get_deref_offset(bld_base, deref, vs_in, gs_in ? &vertex_index : NULL, NULL,
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get_deref_offset(bld_base, deref, vs_in, gs_in ? &vertex_index : NULL, (tcs_in || tcs_out || tes_in) ? &indir_vertex_index : NULL,
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&const_index, &indir_index);
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}
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bld_base->load_var(bld_base, mode, nc, bit_size, var, vertex_index, const_index, indir_index, result);
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bld_base->load_var(bld_base, mode, nc, bit_size, var, vertex_index, indir_vertex_index, const_index, indir_index, result);
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}
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static void
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@ -973,11 +981,14 @@ visit_store_var(struct lp_build_nir_context *bld_base,
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unsigned bit_size = nir_src_bit_size(instr->src[1]);
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LLVMValueRef src = get_src(bld_base, instr->src[1]);
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unsigned const_index = 0;
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LLVMValueRef indir_index;
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if (var)
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get_deref_offset(bld_base, deref, false, NULL, NULL,
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LLVMValueRef indir_index, indir_vertex_index = NULL;
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if (var) {
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bool tcs_out = bld_base->shader->info.stage == MESA_SHADER_TESS_CTRL &&
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var->data.mode == nir_var_shader_out && !var->data.patch;
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get_deref_offset(bld_base, deref, false, NULL, tcs_out ? &indir_vertex_index : NULL,
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&const_index, &indir_index);
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bld_base->store_var(bld_base, mode, instr->num_components, bit_size, var, writemask, const_index, src);
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}
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bld_base->store_var(bld_base, mode, instr->num_components, bit_size, var, writemask, indir_vertex_index, const_index, indir_index, src);
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}
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static void visit_load_ubo(struct lp_build_nir_context *bld_base,
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@ -119,6 +119,7 @@ struct lp_build_nir_context
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unsigned bit_size,
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nir_variable *var,
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unsigned vertex_index,
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LLVMValueRef indir_vertex_index,
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unsigned const_index,
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LLVMValueRef indir_index,
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LLVMValueRef result[NIR_MAX_VEC_COMPONENTS]);
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@ -128,7 +129,9 @@ struct lp_build_nir_context
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unsigned bit_size,
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nir_variable *var,
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unsigned writemask,
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LLVMValueRef indir_vertex_index,
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unsigned const_index,
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LLVMValueRef indir_index,
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LLVMValueRef dst);
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LLVMValueRef (*load_reg)(struct lp_build_nir_context *bld_base,
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@ -204,6 +207,8 @@ struct lp_build_nir_soa_context
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const struct lp_build_image_soa *image;
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const struct lp_build_gs_iface *gs_iface;
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const struct lp_build_tcs_iface *tcs_iface;
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const struct lp_build_tes_iface *tes_iface;
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LLVMValueRef emitted_prims_vec_ptr[PIPE_MAX_VERTEX_STREAMS];
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LLVMValueRef total_emitted_vertices_vec_ptr[PIPE_MAX_VERTEX_STREAMS];
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LLVMValueRef emitted_vertices_vec_ptr[PIPE_MAX_VERTEX_STREAMS];
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@ -289,6 +289,7 @@ static void emit_load_var(struct lp_build_nir_context *bld_base,
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unsigned bit_size,
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nir_variable *var,
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unsigned vertex_index,
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LLVMValueRef indir_vertex_index,
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unsigned const_index,
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LLVMValueRef indir_index,
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LLVMValueRef result[NIR_MAX_VEC_COMPONENTS])
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@ -297,7 +298,7 @@ static void emit_load_var(struct lp_build_nir_context *bld_base,
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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int dmul = bit_size == 64 ? 2 : 1;
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switch (deref_mode) {
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case nir_var_shader_in: {
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case nir_var_shader_in:
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for (unsigned i = 0; i < num_components; i++) {
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int idx = (i * dmul) + var->data.location_frac;
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if (bld->gs_iface) {
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@ -313,6 +314,59 @@ static void emit_load_var(struct lp_build_nir_context *bld_base,
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false, vertex_index_val, 0, attrib_index_val, swizzle_index_val);
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result[i] = emit_fetch_64bit(bld_base, result[i], result2);
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}
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} else if (bld->tes_iface) {
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LLVMValueRef vertex_index_val = lp_build_const_int32(gallivm, vertex_index);
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LLVMValueRef attrib_index_val;
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LLVMValueRef swizzle_index_val = lp_build_const_int32(gallivm, idx);
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LLVMValueRef result2;
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if (indir_index)
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attrib_index_val = lp_build_add(&bld_base->uint_bld, indir_index, lp_build_const_int_vec(gallivm, bld_base->uint_bld.type, var->data.driver_location));
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else
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attrib_index_val = lp_build_const_int32(gallivm, const_index + var->data.driver_location);
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if (var->data.patch) {
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result[i] = bld->tes_iface->fetch_patch_input(bld->tes_iface, &bld_base->base,
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indir_index ? true : false, attrib_index_val, swizzle_index_val);
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if (bit_size == 64) {
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LLVMValueRef swizzle_index_val = lp_build_const_int32(gallivm, idx + 1);
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result2 = bld->tes_iface->fetch_patch_input(bld->tes_iface, &bld_base->base,
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indir_index ? true : false, attrib_index_val, swizzle_index_val);
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result[i] = emit_fetch_64bit(bld_base, result[i], result2);
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}
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}
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else {
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result[i] = bld->tes_iface->fetch_vertex_input(bld->tes_iface, &bld_base->base,
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indir_vertex_index ? true : false,
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indir_vertex_index ? indir_vertex_index : vertex_index_val,
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indir_index ? true : false, attrib_index_val, swizzle_index_val);
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if (bit_size == 64) {
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LLVMValueRef swizzle_index_val = lp_build_const_int32(gallivm, idx + 1);
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result2 = bld->tes_iface->fetch_vertex_input(bld->tes_iface, &bld_base->base,
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indir_vertex_index ? true : false,
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indir_vertex_index ? indir_vertex_index : vertex_index_val,
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indir_index ? true : false, attrib_index_val, swizzle_index_val);
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result[i] = emit_fetch_64bit(bld_base, result[i], result2);
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}
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}
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} else if (bld->tcs_iface) {
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LLVMValueRef vertex_index_val = lp_build_const_int32(gallivm, vertex_index);
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LLVMValueRef attrib_index_val;
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LLVMValueRef swizzle_index_val = lp_build_const_int32(gallivm, idx);
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if (indir_index)
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attrib_index_val = lp_build_add(&bld_base->uint_bld, indir_index, lp_build_const_int_vec(gallivm, bld_base->uint_bld.type, var->data.driver_location));
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else
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attrib_index_val = lp_build_const_int32(gallivm, const_index + var->data.driver_location);
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result[i] = bld->tcs_iface->emit_fetch_input(bld->tcs_iface, &bld_base->base,
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indir_vertex_index ? true : false, indir_vertex_index ? indir_vertex_index : vertex_index_val,
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indir_index ? true : false, attrib_index_val, swizzle_index_val);
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if (bit_size == 64) {
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LLVMValueRef swizzle_index_val = lp_build_const_int32(gallivm, idx + 1);
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LLVMValueRef result2 = bld->tcs_iface->emit_fetch_input(bld->tcs_iface, &bld_base->base,
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indir_vertex_index ? true : false, indir_vertex_index ? indir_vertex_index : vertex_index_val,
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indir_index ? true : false, attrib_index_val, swizzle_index_val);
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result[i] = emit_fetch_64bit(bld_base, result[i], result2);
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}
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} else {
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if (indir_index) {
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LLVMValueRef attrib_index_val = lp_build_add(&bld_base->uint_bld, indir_index, lp_build_const_int_vec(gallivm, bld_base->uint_bld.type, var->data.driver_location));
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@ -359,7 +413,33 @@ static void emit_load_var(struct lp_build_nir_context *bld_base,
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}
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}
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}
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}
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break;
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case nir_var_shader_out:
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for (unsigned i = 0; i < num_components; i++) {
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int idx = (i * dmul) + var->data.location_frac;
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if (bld->tcs_iface) {
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LLVMValueRef vertex_index_val = lp_build_const_int32(gallivm, vertex_index);
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LLVMValueRef attrib_index_val;
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LLVMValueRef swizzle_index_val = lp_build_const_int32(gallivm, idx);
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if (indir_index)
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attrib_index_val = lp_build_add(&bld_base->uint_bld, indir_index, lp_build_const_int_vec(gallivm, bld_base->uint_bld.type, var->data.driver_location));
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else
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attrib_index_val = lp_build_const_int32(gallivm, const_index + var->data.driver_location);
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result[i] = bld->tcs_iface->emit_fetch_output(bld->tcs_iface, &bld_base->base,
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indir_vertex_index ? true : false, indir_vertex_index ? indir_vertex_index : vertex_index_val,
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indir_index ? true : false, attrib_index_val, swizzle_index_val, 0);
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if (bit_size == 64) {
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LLVMValueRef swizzle_index_val = lp_build_const_int32(gallivm, idx + 1);
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LLVMValueRef result2 = bld->tcs_iface->emit_fetch_output(bld->tcs_iface, &bld_base->base,
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indir_vertex_index ? true : false, indir_vertex_index ? indir_vertex_index : vertex_index_val,
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indir_index ? true : false, attrib_index_val, swizzle_index_val, 0);
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result[i] = emit_fetch_64bit(bld_base, result[i], result2);
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}
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}
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}
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break;
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default:
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break;
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}
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@ -392,20 +472,79 @@ static void emit_store_chan(struct lp_build_nir_context *bld_base,
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}
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}
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static void emit_store_tcs_chan(struct lp_build_nir_context *bld_base,
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unsigned bit_size,
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unsigned location,
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unsigned const_index,
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LLVMValueRef indir_vertex_index,
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LLVMValueRef indir_index,
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unsigned comp,
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unsigned chan,
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LLVMValueRef chan_val)
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{
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struct gallivm_state *gallivm = bld_base->base.gallivm;
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struct lp_build_nir_soa_context *bld = (struct lp_build_nir_soa_context *)bld_base;
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LLVMBuilderRef builder = bld->bld_base.base.gallivm->builder;
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unsigned swizzle = chan;
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if (bit_size == 64) {
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swizzle *= 2;
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swizzle += comp;
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if (swizzle >= 4) {
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swizzle -= 4;
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location++;
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}
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} else
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swizzle += comp;
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LLVMValueRef attrib_index_val;
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LLVMValueRef swizzle_index_val = lp_build_const_int32(gallivm, swizzle);
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if (indir_index)
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attrib_index_val = lp_build_add(&bld_base->uint_bld, indir_index, lp_build_const_int_vec(gallivm, bld_base->uint_bld.type, location));
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else
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attrib_index_val = lp_build_const_int32(gallivm, const_index + location);
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if (bit_size == 64) {
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LLVMValueRef split_vals[2];
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LLVMValueRef swizzle_index_val2 = lp_build_const_int32(gallivm, swizzle + 1);
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emit_store_64bit_split(bld_base, chan_val, split_vals);
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bld->tcs_iface->emit_store_output(bld->tcs_iface, &bld_base->base, 0,
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indir_vertex_index ? true : false,
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indir_vertex_index,
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indir_index ? true : false,
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attrib_index_val, swizzle_index_val,
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split_vals[0], mask_vec(bld_base));
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bld->tcs_iface->emit_store_output(bld->tcs_iface, &bld_base->base, 0,
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indir_vertex_index ? true : false,
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indir_vertex_index,
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indir_index ? true : false,
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attrib_index_val, swizzle_index_val2,
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split_vals[1], mask_vec(bld_base));
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} else {
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chan_val = LLVMBuildBitCast(builder, chan_val, bld_base->base.vec_type, "");
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bld->tcs_iface->emit_store_output(bld->tcs_iface, &bld_base->base, 0,
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indir_vertex_index ? true : false,
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indir_vertex_index,
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indir_index ? true : false,
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attrib_index_val, swizzle_index_val,
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chan_val, mask_vec(bld_base));
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}
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}
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static void emit_store_var(struct lp_build_nir_context *bld_base,
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nir_variable_mode deref_mode,
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unsigned num_components,
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unsigned bit_size,
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nir_variable *var,
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unsigned writemask,
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LLVMValueRef indir_vertex_index,
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unsigned const_index,
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LLVMValueRef indir_index,
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LLVMValueRef dst)
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{
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struct lp_build_nir_soa_context *bld = (struct lp_build_nir_soa_context *)bld_base;
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LLVMBuilderRef builder = bld->bld_base.base.gallivm->builder;
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switch (deref_mode) {
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case nir_var_shader_out: {
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unsigned location = var->data.driver_location + const_index;
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unsigned location = var->data.driver_location;
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unsigned comp = var->data.location_frac;
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if (bld_base->shader->info.stage == MESA_SHADER_FRAGMENT) {
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if (var->data.location == FRAG_RESULT_STENCIL)
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@ -413,10 +552,14 @@ static void emit_store_var(struct lp_build_nir_context *bld_base,
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else if (var->data.location == FRAG_RESULT_DEPTH)
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comp = 2;
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}
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for (unsigned chan = 0; chan < num_components; chan++) {
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if (writemask & (1u << chan)) {
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LLVMValueRef chan_val = (num_components == 1) ? dst : LLVMBuildExtractValue(builder, dst, chan, "");
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emit_store_chan(bld_base, deref_mode, bit_size, location, comp, chan, chan_val);
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if (bld->tcs_iface) {
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emit_store_tcs_chan(bld_base, bit_size, location, const_index, indir_vertex_index, indir_index, comp, chan, chan_val);
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} else
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emit_store_chan(bld_base, deref_mode, bit_size, location + const_index, comp, chan, chan_val);
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}
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}
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break;
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@ -1102,6 +1245,8 @@ static void init_var_slots(struct lp_build_nir_context *bld_base,
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struct lp_build_nir_soa_context *bld = (struct lp_build_nir_soa_context *)bld_base;
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unsigned slots = glsl_count_attribute_slots(var->type, false) * 4;
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if (!bld->outputs)
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return;
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for (unsigned comp = sc; comp < slots + sc; comp++) {
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unsigned this_loc = var->data.driver_location + (comp / 4);
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unsigned this_chan = comp % 4;
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@ -1409,7 +1554,7 @@ static void
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emit_prologue(struct lp_build_nir_soa_context *bld)
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{
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struct gallivm_state * gallivm = bld->bld_base.base.gallivm;
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if (bld->indirects & nir_var_shader_in && !bld->gs_iface) {
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if (bld->indirects & nir_var_shader_in && !bld->gs_iface && !bld->tcs_iface && !bld->tes_iface) {
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uint32_t num_inputs = util_bitcount64(bld->bld_base.shader->info.inputs_read);
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unsigned index, chan;
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LLVMTypeRef vec_type = bld->bld_base.base.vec_type;
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@ -1607,6 +1752,8 @@ void lp_build_nir_soa(struct gallivm_state *gallivm,
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bld.indirects |= nir_var_shader_in;
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bld.gs_iface = params->gs_iface;
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bld.tcs_iface = params->tcs_iface;
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bld.tes_iface = params->tes_iface;
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if (bld.gs_iface) {
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struct lp_build_context *uint_bld = &bld.bld_base.uint_bld;
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