diff --git a/src/intel/compiler/brw/brw_reg_allocate.cpp b/src/intel/compiler/brw/brw_reg_allocate.cpp
index 950fc9b743c..6d3526692e8 100644
--- a/src/intel/compiler/brw/brw_reg_allocate.cpp
+++ b/src/intel/compiler/brw/brw_reg_allocate.cpp
@@ -602,10 +602,13 @@ brw_reg_alloc::setup_inst_interference(const brw_inst *inst)
        * This node has a fixed assignment to grf127.
        *
        * We don't apply it to SIMD16 instructions because previous code avoids
-       * any register overlap between sources and destination.
+       * any register overlap between sources and destination. Some care is
+       * taken to detect when interference may not have been added between
+       * source and destination. This can occur in SIMD16 with UW
+       * destination. See also gitlab issue #14171.
        */
       if (inst->opcode == SHADER_OPCODE_SEND && inst->dst.file == VGRF &&
-          inst->exec_size < 16)
+          (inst->exec_size < 16 || brw_type_size_bytes(inst->dst.type) < 4))
          ra_add_node_interference(g, first_vgrf_node + inst->dst.nr,
                                      grf127_send_hack_node);
    }