diff --git a/src/amd/common/ac_spm.c b/src/amd/common/ac_spm.c index 3fb780b3f2b..e05097ef778 100644 --- a/src/amd/common/ac_spm.c +++ b/src/amd/common/ac_spm.c @@ -13,18 +13,30 @@ /* SPM counters definition. */ /* GFX10+ */ -static struct ac_spm_counter_descr gfx10_tcp_perf_sel_req = {TCP, 0x9}; -static struct ac_spm_counter_descr gfx10_tcp_perf_sel_req_miss = {TCP, 0x12}; -static struct ac_spm_counter_descr gfx10_sqc_perf_sel_dcache_hits = {SQ, 0x14f}; -static struct ac_spm_counter_descr gfx10_sqc_perf_sel_dcache_misses = {SQ, 0x150}; -static struct ac_spm_counter_descr gfx10_sqc_perf_sel_dcache_misses_duplicate = {SQ, 0x151}; -static struct ac_spm_counter_descr gfx10_sqc_perf_sel_icache_hits = {SQ, 0x12c}; -static struct ac_spm_counter_descr gfx10_sqc_perf_sel_icache_misses = {SQ, 0x12d}; -static struct ac_spm_counter_descr gfx10_sqc_perf_sel_icache_misses_duplicate = {SQ, 0x12e}; -static struct ac_spm_counter_descr gfx10_gl1c_perf_sel_req = {GL1C, 0xe}; -static struct ac_spm_counter_descr gfx10_gl1c_perf_sel_req_miss = {GL1C, 0x12}; -static struct ac_spm_counter_descr gfx10_gl2c_perf_sel_req = {GL2C, 0x3}; -static struct ac_spm_counter_descr gfx10_gl2c_perf_sel_miss = {GL2C, 0x23}; +static struct ac_spm_counter_descr gfx10_tcp_perf_sel_req = + {AC_SPM_TCP_PERF_SEL_REQ, TCP, 0x9}; +static struct ac_spm_counter_descr gfx10_tcp_perf_sel_req_miss = + {AC_SPM_TCP_PERF_SEL_REQ_MISS, TCP, 0x12}; +static struct ac_spm_counter_descr gfx10_sqc_perf_sel_dcache_hits = + {AC_SPM_SQC_PERF_SEL_DCACHE_HITS, SQ, 0x14f}; +static struct ac_spm_counter_descr gfx10_sqc_perf_sel_dcache_misses = + {AC_SPM_SQC_PERF_SEL_DCACHE_MISSES, SQ, 0x150}; +static struct ac_spm_counter_descr gfx10_sqc_perf_sel_dcache_misses_duplicate = + {AC_SPM_SQC_PERF_SEL_DCACHE_MISSES_DUPLICATE, SQ, 0x151}; +static struct ac_spm_counter_descr gfx10_sqc_perf_sel_icache_hits = + {AC_SPM_SQC_PERF_SEL_ICACHE_HITS, SQ, 0x12c}; +static struct ac_spm_counter_descr gfx10_sqc_perf_sel_icache_misses = + {AC_SPM_SQC_PERF_SEL_ICACHE_MISSES, SQ, 0x12d}; +static struct ac_spm_counter_descr gfx10_sqc_perf_sel_icache_misses_duplicate = + {AC_SPM_SQC_PERF_SEL_ICACHE_MISSES_DUPLICATE, SQ, 0x12e}; +static struct ac_spm_counter_descr gfx10_gl1c_perf_sel_req = + {AC_SPM_GL1C_PERF_SEL_REQ, GL1C, 0xe}; +static struct ac_spm_counter_descr gfx10_gl1c_perf_sel_req_miss = + {AC_SPM_GL1C_PERF_SEL_REQ_MISS, GL1C, 0x12}; +static struct ac_spm_counter_descr gfx10_gl2c_perf_sel_req = + {AC_SPM_GL2C_PERF_SEL_REQ, GL2C, 0x3}; +static struct ac_spm_counter_descr gfx10_gl2c_perf_sel_miss = + {AC_SPM_GL2C_PERF_SEL_MISS, GL2C, 0x23}; static struct ac_spm_counter_create_info gfx10_spm_counters[] = { {&gfx10_tcp_perf_sel_req}, @@ -42,7 +54,8 @@ static struct ac_spm_counter_create_info gfx10_spm_counters[] = { }; /* GFX10.3+ */ -static struct ac_spm_counter_descr gfx103_gl2c_perf_sel_miss = {GL2C, 0x2b}; +static struct ac_spm_counter_descr gfx103_gl2c_perf_sel_miss = + {AC_SPM_GL2C_PERF_SEL_MISS, GL2C, 0x2b}; static struct ac_spm_counter_create_info gfx103_spm_counters[] = { {&gfx10_tcp_perf_sel_req}, @@ -60,13 +73,20 @@ static struct ac_spm_counter_create_info gfx103_spm_counters[] = { }; /* GFX11+ */ -static struct ac_spm_counter_descr gfx11_tcp_perf_sel_req_miss = {TCP, 0x11}; -static struct ac_spm_counter_descr gfx11_sqc_perf_sel_dcache_hits = {SQ_WGP, 0x126}; -static struct ac_spm_counter_descr gfx11_sqc_perf_sel_dcache_misses = {SQ_WGP, 0x127}; -static struct ac_spm_counter_descr gfx11_sqc_perf_sel_dcache_misses_duplicate = {SQ_WGP, 0x128}; -static struct ac_spm_counter_descr gfx11_sqc_perf_sel_icache_hits = {SQ_WGP, 0x10e}; -static struct ac_spm_counter_descr gfx11_sqc_perf_sel_icache_misses = {SQ_WGP, 0x10f}; -static struct ac_spm_counter_descr gfx11_sqc_perf_sel_icache_misses_duplicate = {SQ_WGP, 0x110}; +static struct ac_spm_counter_descr gfx11_tcp_perf_sel_req_miss = + {AC_SPM_TCP_PERF_SEL_REQ_MISS, TCP, 0x11}; +static struct ac_spm_counter_descr gfx11_sqc_perf_sel_dcache_hits = + {AC_SPM_SQC_PERF_SEL_DCACHE_HITS, SQ_WGP, 0x126}; +static struct ac_spm_counter_descr gfx11_sqc_perf_sel_dcache_misses = + {AC_SPM_SQC_PERF_SEL_DCACHE_MISSES, SQ_WGP, 0x127}; +static struct ac_spm_counter_descr gfx11_sqc_perf_sel_dcache_misses_duplicate = + {AC_SPM_SQC_PERF_SEL_DCACHE_MISSES_DUPLICATE, SQ_WGP, 0x128}; +static struct ac_spm_counter_descr gfx11_sqc_perf_sel_icache_hits = + {AC_SPM_SQC_PERF_SEL_ICACHE_HITS, SQ_WGP, 0x10e}; +static struct ac_spm_counter_descr gfx11_sqc_perf_sel_icache_misses = + {AC_SPM_SQC_PERF_SEL_ICACHE_MISSES, SQ_WGP, 0x10f}; +static struct ac_spm_counter_descr gfx11_sqc_perf_sel_icache_misses_duplicate = + {AC_SPM_SQC_PERF_SEL_ICACHE_MISSES_DUPLICATE, SQ_WGP, 0x110}; static struct ac_spm_counter_create_info gfx11_spm_counters[] = { {&gfx10_tcp_perf_sel_req}, @@ -84,13 +104,20 @@ static struct ac_spm_counter_create_info gfx11_spm_counters[] = { }; /* GFX12+ */ -static struct ac_spm_counter_descr gfx12_sqc_perf_sel_dcache_hits = {SQ_WGP, 0x146}; -static struct ac_spm_counter_descr gfx12_sqc_perf_sel_dcache_misses = {SQ_WGP, 0x147}; -static struct ac_spm_counter_descr gfx12_sqc_perf_sel_dcache_misses_duplicate = {SQ_WGP, 0x148}; -static struct ac_spm_counter_descr gfx12_sqc_perf_sel_icache_hits = {SQ_WGP, 0x12e}; -static struct ac_spm_counter_descr gfx12_sqc_perf_sel_icache_misses = {SQ_WGP, 0x12f}; -static struct ac_spm_counter_descr gfx12_sqc_perf_sel_icache_misses_duplicate = {SQ_WGP, 0x130}; -static struct ac_spm_counter_descr gfx12_gl2c_perf_sel_miss = {GL2C, 0x2a}; +static struct ac_spm_counter_descr gfx12_sqc_perf_sel_dcache_hits = + {AC_SPM_SQC_PERF_SEL_DCACHE_HITS, SQ_WGP, 0x146}; +static struct ac_spm_counter_descr gfx12_sqc_perf_sel_dcache_misses = + {AC_SPM_SQC_PERF_SEL_DCACHE_MISSES, SQ_WGP, 0x147}; +static struct ac_spm_counter_descr gfx12_sqc_perf_sel_dcache_misses_duplicate = + {AC_SPM_SQC_PERF_SEL_DCACHE_MISSES_DUPLICATE, SQ_WGP, 0x148}; +static struct ac_spm_counter_descr gfx12_sqc_perf_sel_icache_hits = + {AC_SPM_SQC_PERF_SEL_ICACHE_HITS, SQ_WGP, 0x12e}; +static struct ac_spm_counter_descr gfx12_sqc_perf_sel_icache_misses = + {AC_SPM_SQC_PERF_SEL_ICACHE_MISSES, SQ_WGP, 0x12f}; +static struct ac_spm_counter_descr gfx12_sqc_perf_sel_icache_misses_duplicate = + {AC_SPM_SQC_PERF_SEL_ICACHE_MISSES_DUPLICATE, SQ_WGP, 0x130}; +static struct ac_spm_counter_descr gfx12_gl2c_perf_sel_miss = + {AC_SPM_GL2C_PERF_SEL_MISS, GL2C, 0x2a}; static struct ac_spm_counter_create_info gfx12_spm_counters[] = { {&gfx10_tcp_perf_sel_req}, @@ -411,6 +438,7 @@ ac_spm_add_counter(const struct radeon_info *info, counter = &spm->counters[spm->num_counters]; spm->num_counters++; + counter->id = counter_info->b->id; counter->gpu_block = counter_info->b->gpu_block; counter->event_id = counter_info->b->event_id; counter->instance = counter_info->instance; diff --git a/src/amd/common/ac_spm.h b/src/amd/common/ac_spm.h index e0886679072..f21b2c59c7e 100644 --- a/src/amd/common/ac_spm.h +++ b/src/amd/common/ac_spm.h @@ -86,7 +86,24 @@ enum ac_spm_segment_type { AC_SPM_SEGMENT_TYPE_COUNT, }; +enum ac_spm_raw_counter_id { + AC_SPM_TCP_PERF_SEL_REQ = 0, + AC_SPM_TCP_PERF_SEL_REQ_MISS, + AC_SPM_SQC_PERF_SEL_DCACHE_HITS, + AC_SPM_SQC_PERF_SEL_DCACHE_MISSES, + AC_SPM_SQC_PERF_SEL_DCACHE_MISSES_DUPLICATE, + AC_SPM_SQC_PERF_SEL_ICACHE_HITS, + AC_SPM_SQC_PERF_SEL_ICACHE_MISSES, + AC_SPM_SQC_PERF_SEL_ICACHE_MISSES_DUPLICATE, + AC_SPM_GL1C_PERF_SEL_REQ, + AC_SPM_GL1C_PERF_SEL_REQ_MISS, + AC_SPM_GL2C_PERF_SEL_REQ, + AC_SPM_GL2C_PERF_SEL_MISS, + AC_SPM_RAW_COUNTER_ID_COUNT, +}; + struct ac_spm_counter_descr { + enum ac_spm_raw_counter_id id; enum ac_pc_gpu_block gpu_block; uint32_t event_id; }; @@ -119,6 +136,7 @@ struct ac_spm_muxsel_line { struct ac_spm_counter_info { /* General info. */ + enum ac_spm_raw_counter_id id; enum ac_pc_gpu_block gpu_block; uint32_t instance; uint32_t event_id;