mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-05 09:38:07 +02:00
panfrost: Rename (LD|LEA)_BUFFER to (LD|LEA)_PKA
This aligns with internal naming and removes confusion with LEA_BUF[_IMM]. Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37007>
This commit is contained in:
parent
00b5275fe8
commit
3e3da8cf82
8 changed files with 55 additions and 57 deletions
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@ -328,10 +328,10 @@ can_remat(bi_instr *I)
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case BI_OPCODE_IADD_IMM_I32:
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case BI_OPCODE_IADD_IMM_V2I16:
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return only_const_sources(I);
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case BI_OPCODE_LD_BUFFER_I8:
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case BI_OPCODE_LD_BUFFER_I16:
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case BI_OPCODE_LD_BUFFER_I24:
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case BI_OPCODE_LD_BUFFER_I32:
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case BI_OPCODE_LD_PKA_I8:
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case BI_OPCODE_LD_PKA_I16:
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case BI_OPCODE_LD_PKA_I24:
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case BI_OPCODE_LD_PKA_I32:
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/* TODO: Allow loads that write >1 reg. */
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return only_const_sources(I);
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case BI_OPCODE_MOV_I32:
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@ -358,14 +358,14 @@ remat_to(bi_builder *b, bi_index dst, struct spill_ctx *ctx, unsigned node)
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return bi_iadd_imm_i32_to(b, dst, I->src[0], I->index);
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case BI_OPCODE_IADD_IMM_V2I16:
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return bi_iadd_imm_v2i16_to(b, dst, I->src[0], I->index);
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case BI_OPCODE_LD_BUFFER_I8:
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return bi_ld_buffer_i8_to(b, dst, I->src[0], I->src[1]);
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case BI_OPCODE_LD_BUFFER_I16:
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return bi_ld_buffer_i16_to(b, dst, I->src[0], I->src[1]);
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case BI_OPCODE_LD_BUFFER_I24:
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return bi_ld_buffer_i24_to(b, dst, I->src[0], I->src[1]);
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case BI_OPCODE_LD_BUFFER_I32:
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return bi_ld_buffer_i32_to(b, dst, I->src[0], I->src[1]);
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case BI_OPCODE_LD_PKA_I8:
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return bi_ld_pka_i8_to(b, dst, I->src[0], I->src[1]);
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case BI_OPCODE_LD_PKA_I16:
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return bi_ld_pka_i16_to(b, dst, I->src[0], I->src[1]);
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case BI_OPCODE_LD_PKA_I24:
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return bi_ld_pka_i24_to(b, dst, I->src[0], I->src[1]);
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case BI_OPCODE_LD_PKA_I32:
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return bi_ld_pka_i32_to(b, dst, I->src[0], I->src[1]);
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case BI_OPCODE_MOV_I32:
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assert(I->src[0].type == BI_INDEX_CONSTANT ||
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I->src[0].type == BI_INDEX_FAU);
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@ -8787,12 +8787,12 @@
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<src start="0"/>
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</ins>
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<ins name="LD_BUFFER.i128" staging="w=4" pseudo="true" message="load" unit="add">
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<ins name="LD_PKA.i128" staging="w=4" pseudo="true" message="load" unit="add">
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<src start="0"/>
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<src start="3"/>
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</ins>
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<ins name="LD_BUFFER.i16" staging="w=1" pseudo="true" message="load" unit="add">
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<ins name="LD_PKA.i16" staging="w=1" pseudo="true" message="load" unit="add">
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<src start="0"/>
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<src start="3"/>
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<mod name="lane_dest" size="2" default="h0">
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@ -8808,12 +8808,12 @@
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</mod>
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</ins>
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<ins name="LD_BUFFER.i24" staging="w=1" pseudo="true" message="load" unit="add">
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<ins name="LD_PKA.i24" staging="w=1" pseudo="true" message="load" unit="add">
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<src start="0"/>
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<src start="3"/>
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</ins>
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<ins name="LD_BUFFER.i32" staging="w=1" pseudo="true" message="load" unit="add">
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<ins name="LD_PKA.i32" staging="w=1" pseudo="true" message="load" unit="add">
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<src start="0"/>
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<src start="3"/>
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<mod name="lane_dest" size="1" opt="d0"/>
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@ -8824,17 +8824,17 @@
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</mod>
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</ins>
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<ins name="LD_BUFFER.i48" staging="w=2" pseudo="true" message="load" unit="add">
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<ins name="LD_PKA.i48" staging="w=2" pseudo="true" message="load" unit="add">
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<src start="0"/>
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<src start="3"/>
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</ins>
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<ins name="LD_BUFFER.i64" staging="w=2" pseudo="true" message="load" unit="add">
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<ins name="LD_PKA.i64" staging="w=2" pseudo="true" message="load" unit="add">
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<src start="0"/>
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<src start="3"/>
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</ins>
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<ins name="LD_BUFFER.i8" staging="w=1" pseudo="true" message="load" unit="add">
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<ins name="LD_PKA.i8" staging="w=1" pseudo="true" message="load" unit="add">
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<src start="0"/>
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<src start="3"/>
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<mod name="lane_dest" size="3" default="b0">
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@ -8854,7 +8854,7 @@
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</mod>
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</ins>
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<ins name="LD_BUFFER.i96" staging="w=3" pseudo="true" message="load" unit="add">
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<ins name="LD_PKA.i96" staging="w=3" pseudo="true" message="load" unit="add">
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<src start="0"/>
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<src start="3"/>
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</ins>
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@ -845,7 +845,7 @@ bi_load_ubo_to(bi_builder *b, unsigned bitsize, bi_index dest0, bi_index src0,
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bi_instr *I;
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if (b->shader->arch >= 9) {
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I = bi_ld_buffer_to(b, bitsize, dest0, src0, src1);
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I = bi_ld_pka_to(b, bitsize, dest0, src0, src1);
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I->seg = BI_SEG_UBO;
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} else {
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I = bi_load_to(b, bitsize, dest0, src0, src1, BI_SEG_UBO, 0);
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@ -2380,16 +2380,16 @@ bi_emit_intrinsic(bi_builder *b, nir_intrinsic_instr *instr)
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case nir_intrinsic_load_ssbo_address:
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assert(b->shader->arch >= 9);
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bi_lea_buffer_to(b, dst, bi_src_index(&instr->src[1]),
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bi_src_index(&instr->src[0]));
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bi_lea_pka_to(b, dst, bi_src_index(&instr->src[1]),
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bi_src_index(&instr->src[0]));
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bi_emit_cached_split(b, dst, 64);
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break;
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case nir_intrinsic_load_ssbo: {
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assert(b->shader->arch >= 9);
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unsigned dst_bits = instr->num_components * instr->def.bit_size;
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bi_ld_buffer_to(b, dst_bits, dst, bi_src_index(&instr->src[1]),
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bi_src_index(&instr->src[0]));
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bi_ld_pka_to(b, dst_bits, dst, bi_src_index(&instr->src[1]),
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bi_src_index(&instr->src[0]));
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bi_emit_cached_split(b, dst, dst_bits);
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break;
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}
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@ -1148,7 +1148,7 @@
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<src>Index and table</src>
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</ins>
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<ins name="LD_BUFFER.i8" title="Global memory load" message="load" opcode="0x6a" opcode2="0" unit="LS">
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<ins name="LD_PKA.i8" title="Global memory load" message="load" opcode="0x6a" opcode2="0" unit="LS">
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<desc>
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Loads a buffer descriptor. If bits 25...31 of the mode descriptor are
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all-ones, load from the buffer descriptors in the table indexed by the
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@ -1165,7 +1165,7 @@
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<src size="32">Mode descriptor</src>
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</ins>
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<ins name="LD_BUFFER.i16" title="Global memory load" message="load" opcode="0x6a" opcode2="1" unit="LS">
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<ins name="LD_PKA.i16" title="Global memory load" message="load" opcode="0x6a" opcode2="1" unit="LS">
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<desc>
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Loads a buffer descriptor. If bits 25...31 of the mode descriptor are
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all-ones, load from the buffer descriptors in the table indexed by the
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@ -1182,7 +1182,7 @@
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<src size="32">Mode descriptor</src>
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</ins>
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<ins name="LD_BUFFER.i24" title="Global memory load" message="load" opcode="0x6a" opcode2="2" unit="LS">
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<ins name="LD_PKA.i24" title="Global memory load" message="load" opcode="0x6a" opcode2="2" unit="LS">
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<desc>
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Loads a buffer descriptor. If bits 25...31 of the mode descriptor are
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all-ones, load from the buffer descriptors in the table indexed by the
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@ -1199,7 +1199,7 @@
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<src size="32">Mode descriptor</src>
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</ins>
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<ins name="LD_BUFFER.i32" title="Global memory load" message="load" opcode="0x6a" opcode2="3" unit="LS">
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<ins name="LD_PKA.i32" title="Global memory load" message="load" opcode="0x6a" opcode2="3" unit="LS">
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<desc>
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Loads a buffer descriptor. If bits 25...31 of the mode descriptor are
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all-ones, load from the buffer descriptors in the table indexed by the
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@ -1216,7 +1216,7 @@
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<src size="32">Mode descriptor</src>
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</ins>
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<ins name="LD_BUFFER.i48" title="Global memory load" message="load" opcode="0x6a" opcode2="4" unit="LS">
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<ins name="LD_PKA.i48" title="Global memory load" message="load" opcode="0x6a" opcode2="4" unit="LS">
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<desc>
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Loads a buffer descriptor. If bits 25...31 of the mode descriptor are
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all-ones, load from the buffer descriptors in the table indexed by the
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@ -1233,7 +1233,7 @@
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<src size="32">Mode descriptor</src>
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</ins>
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<ins name="LD_BUFFER.i64" title="Global memory load" message="load" opcode="0x6a" opcode2="5" unit="LS">
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<ins name="LD_PKA.i64" title="Global memory load" message="load" opcode="0x6a" opcode2="5" unit="LS">
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<desc>
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Loads a buffer descriptor. If bits 25...31 of the mode descriptor are
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all-ones, load from the buffer descriptors in the table indexed by the
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@ -1250,7 +1250,7 @@
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<src size="32">Mode descriptor</src>
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</ins>
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<ins name="LD_BUFFER.i96" title="Global memory load" message="load" opcode="0x6a" opcode2="6" unit="LS">
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<ins name="LD_PKA.i96" title="Global memory load" message="load" opcode="0x6a" opcode2="6" unit="LS">
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<desc>
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Loads a buffer descriptor. If bits 25...31 of the mode descriptor are
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all-ones, load from the buffer descriptors in the table indexed by the
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@ -1267,7 +1267,7 @@
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<src size="32">Mode descriptor</src>
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</ins>
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<ins name="LD_BUFFER.i128" title="Global memory load" message="load" opcode="0x6a" opcode2="7" unit="LS">
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<ins name="LD_PKA.i128" title="Global memory load" message="load" opcode="0x6a" opcode2="7" unit="LS">
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<desc>
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Loads a buffer descriptor. If bits 25...31 of the mode descriptor are
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all-ones, load from the buffer descriptors in the table indexed by the
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@ -1410,7 +1410,7 @@
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<imm name="offset" start="8" size="16" signed="true"/>
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</group>
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<ins name="LEA_BUFFER" title="Load buffer effective address" message="attribute" opcode="0x6B" unit="LS">
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<ins name="LEA_PKA" title="Load buffer effective address" message="attribute" opcode="0x6B" unit="LS">
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<desc>
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Load effective address of a simple buffer with an offset added.
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</desc>
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@ -111,13 +111,13 @@ c0 01 00 00 00 c4 10 51 IADD_IMM.i32.reconverge r4, 0x0, #0x1
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44 00 46 36 28 40 71 78 ST_CVT.slot0.istream.v4.u32.end @r0:r1:r2:r3, ^r4, ^r6, offset:0x0
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7c c0 12 00 26 84 67 00 LEA_TEX_IMM.slot0 @r4:r5:r6, ^r60, 0x0, table:0x2, index:0x1
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7c c0 02 00 26 84 67 00 LEA_TEX_IMM.slot0 @r4:r5:r6, ^r60, 0x0, table:0x2, index:0x0
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82 81 00 28 f4 82 6a 00 LD_BUFFER.i64.unsigned.slot0 @r2:r3, u2, u1
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80 81 00 68 f4 80 6a 00 LD_BUFFER.i64.unsigned.slot1 @r0:r1, u0, u1
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84 81 00 a8 f4 a6 6a 00 LD_BUFFER.i64.unsigned.slot2 @r38:r39, u4, u1
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83 81 00 a8 f4 a4 6a 00 LD_BUFFER.i64.unsigned.slot2 @r36:r37, u3, u1
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83 84 00 28 f4 82 6a 00 LD_BUFFER.i64.unsigned.slot0 @r2:r3, u3, u4
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41 82 00 30 e6 82 6a 00 LD_BUFFER.i96.unsigned.slot0 @r2:r3:r4, ^r1, u2
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40 83 00 30 e6 86 6a 08 LD_BUFFER.i96.unsigned.slot0.wait0 @r6:r7:r8, ^r0, u3
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82 81 00 28 f4 82 6a 00 LD_PKA.i64.unsigned.slot0 @r2:r3, u2, u1
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80 81 00 68 f4 80 6a 00 LD_PKA.i64.unsigned.slot1 @r0:r1, u0, u1
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84 81 00 a8 f4 a6 6a 00 LD_PKA.i64.unsigned.slot2 @r38:r39, u4, u1
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83 81 00 a8 f4 a4 6a 00 LD_PKA.i64.unsigned.slot2 @r36:r37, u3, u1
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83 84 00 28 f4 82 6a 00 LD_PKA.i64.unsigned.slot0 @r2:r3, u3, u4
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41 82 00 30 e6 82 6a 00 LD_PKA.i96.unsigned.slot0 @r2:r3:r4, ^r1, u2
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40 83 00 30 e6 86 6a 08 LD_PKA.i96.unsigned.slot0.wait0 @r6:r7:r8, ^r0, u3
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40 00 00 00 c0 c0 9c 40 FRCP.f32.wait0126 r0, ^r0.neg.abs
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40 44 80 00 00 c0 b8 00 MUX.i32.neg r0, ^r0, ^r4, u0
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40 44 80 00 01 c0 b8 00 MUX.i32 r0, ^r0, ^r4, u0
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@ -242,4 +242,4 @@ c4 c0 40 10 71 c0 b6 00 LSHIFT_AND.v4i8 r0, 0x1000000.b3333, 0x0.b00, ^r0
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41 40 0b 40 00 c0 aa 00 HADD.v4s8.rhadd r0, ^r1, ^r0
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01 00 c0 80 01 c2 fa 00 ICMP_OR.v4s8.gt.m1 r2, r1, r0, 0x0
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40 41 42 00 01 c0 ba 00 MUX.v4i8 r0, ^r0, ^r1, ^r2
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c0 c0 00 00 04 82 6b 00 LEA_BUFFER.slot0 @r2:r3, 0x0, 0x0
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c0 c0 00 00 04 82 6b 00 LEA_PKA.slot0 @r2:r3, 0x0, 0x0
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@ -117,14 +117,12 @@ TEST_F(ValidateFau, SmokeTests)
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VALID(bi_mov_i32_to(b, bi_register(1), unif));
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VALID(bi_fma_f32_to(b, bi_register(1), bi_discard(bi_register(1)), unif,
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bi_neg(zero)));
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VALID(
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bi_ld_buffer_to(b, 32, bi_register(1), bi_register(2), bi_register(3)));
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VALID(bi_ld_pka_to(b, 32, bi_register(1), bi_register(2), bi_register(3)));
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}
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TEST_F(ValidateFau, MessageInstructionConstraints)
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{
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VALID(
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bi_ld_buffer_to(b, 32, bi_register(1), bi_register(2), fb_extend_max_x));
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INVALID(bi_ld_buffer_to(b, 32, bi_register(1), bi_register(2), warp_id));
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INVALID(bi_ld_buffer_to(b, 32, bi_register(1), bi_register(2), core_id));
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VALID(bi_ld_pka_to(b, 32, bi_register(1), bi_register(2), fb_extend_max_x));
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INVALID(bi_ld_pka_to(b, 32, bi_register(1), bi_register(2), warp_id));
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INVALID(bi_ld_pka_to(b, 32, bi_register(1), bi_register(2), core_id));
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}
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@ -891,14 +891,14 @@ va_pack_instr(const bi_instr *I, unsigned arch)
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hex |= va_pack_load(I, false);
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break;
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case BI_OPCODE_LD_BUFFER_I8:
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case BI_OPCODE_LD_BUFFER_I16:
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case BI_OPCODE_LD_BUFFER_I24:
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case BI_OPCODE_LD_BUFFER_I32:
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case BI_OPCODE_LD_BUFFER_I48:
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case BI_OPCODE_LD_BUFFER_I64:
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case BI_OPCODE_LD_BUFFER_I96:
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case BI_OPCODE_LD_BUFFER_I128:
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case BI_OPCODE_LD_PKA_I8:
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case BI_OPCODE_LD_PKA_I16:
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case BI_OPCODE_LD_PKA_I24:
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case BI_OPCODE_LD_PKA_I32:
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case BI_OPCODE_LD_PKA_I48:
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case BI_OPCODE_LD_PKA_I64:
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case BI_OPCODE_LD_PKA_I96:
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case BI_OPCODE_LD_PKA_I128:
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hex |= va_pack_load(I, true);
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break;
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@ -200,7 +200,7 @@ class Instruction:
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if opcode == 0x90:
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# XXX: XMLify this, but disambiguates sign of conversions
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self.secondary_mask |= 0x10
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if name.startswith("LOAD.i") or name.startswith("STORE.i") or name.startswith("LD_BUFFER.i"):
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if name.startswith("LOAD.i") or name.startswith("STORE.i") or name.startswith("LD_PKA.i"):
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self.secondary_shift = 27 # Alias with memory_size
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self.secondary_mask = 0x7
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if "descriptor_type" in [x.name for x in self.modifiers]:
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