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radv: apply the tess+GS hang workaround to Polaris12 as well

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As I pointed out for radeonsi, and AMD confirmed, so fix this
in radv as well.

Cc: "17.1" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 2add79a732)
This commit is contained in:
Dave Airlie 2017-05-06 21:14:11 +01:00 • committed by Emil Velikov
parent 396f9ae52f
commit 3db01cd4e7
1 changed files with 2 additions and 1 deletions
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3
src/amd/vulkan/si_cmd_buffer.c
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@ -672,7 +672,8 @@ si_get_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer,
if (family == CHIP_TONGA ||
family == CHIP_FIJI ||
family == CHIP_POLARIS10 ||
family == CHIP_POLARIS11)
family == CHIP_POLARIS11 ||
family == CHIP_POLARIS12)
partial_vs_wave = true;
} else {
partial_vs_wave = true;