diff --git a/src/amd/common/ac_perfcounter.c b/src/amd/common/ac_perfcounter.c index 72eebce07ef..05cad676a12 100644 --- a/src/amd/common/ac_perfcounter.c +++ b/src/amd/common/ac_perfcounter.c @@ -46,7 +46,7 @@ static struct ac_pc_block_base cik_CB = { .select0 = cik_CB_select0, .select1 = cik_CB_select1, .counter0_lo = R_035018_CB_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* cik_CPC */ @@ -68,7 +68,7 @@ static struct ac_pc_block_base cik_CPC = { .select0 = cik_CPC_select0, .select1 = cik_CPC_select1, .counters = cik_CPC_counters, - .num_multi = 1, + .num_spm_counters = 1, }; /* cik_CPF */ @@ -90,7 +90,7 @@ static struct ac_pc_block_base cik_CPF = { .select0 = cik_CPF_select0, .select1 = cik_CPF_select1, .counters = cik_CPF_counters, - .num_multi = 1, + .num_spm_counters = 1, }; /* cik_CPG */ @@ -112,7 +112,7 @@ static struct ac_pc_block_base cik_CPG = { .select0 = cik_CPG_select0, .select1 = cik_CPG_select1, .counters = cik_CPG_counters, - .num_multi = 1, + .num_spm_counters = 1, }; /* cik_DB */ @@ -134,7 +134,7 @@ static struct ac_pc_block_base cik_DB = { .select0 = cik_DB_select0, .select1 = cik_DB_select1, .counter0_lo = R_035100_DB_PERFCOUNTER0_LO, - .num_multi = 2, + .num_spm_counters = 2, }; /* cik_GDS */ @@ -154,7 +154,7 @@ static struct ac_pc_block_base cik_GDS = { .select0 = cik_GDS_select0, .select1 = cik_GDS_select1, .counter0_lo = R_034A00_GDS_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* cik_GRBM */ @@ -206,7 +206,7 @@ static struct ac_pc_block_base cik_IA = { .select0 = cik_IA_select0, .select1 = cik_IA_select1, .counter0_lo = R_034220_IA_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* cik_PA_SC */ @@ -231,7 +231,7 @@ static struct ac_pc_block_base cik_PA_SC = { .select0 = cik_PA_SC_select0, .select1 = cik_PA_SC_select1, .counter0_lo = R_034500_PA_SC_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* cik_PA_SU */ @@ -254,7 +254,7 @@ static struct ac_pc_block_base cik_PA_SU = { .select0 = cik_PA_SU_select0, .select1 = cik_PA_SU_select1, .counter0_lo = R_034400_PA_SU_PERFCOUNTER0_LO, - .num_multi = 2, + .num_spm_counters = 2, }; /* cik_SPI */ @@ -280,7 +280,7 @@ static struct ac_pc_block_base cik_SPI = { .select0 = cik_SPI_select0, .select1 = cik_SPI_select1, .counter0_lo = R_034604_SPI_PERFCOUNTER0_LO, - .num_multi = 4, + .num_spm_counters = 4, }; /* cik_SQ */ @@ -331,7 +331,7 @@ static struct ac_pc_block_base cik_SX = { .select0 = cik_SX_select0, .select1 = cik_SX_select1, .counter0_lo = R_034900_SX_PERFCOUNTER0_LO, - .num_multi = 2, + .num_spm_counters = 2, }; /* cik_TA */ @@ -350,7 +350,7 @@ static struct ac_pc_block_base cik_TA = { .select0 = cik_TA_select0, .select1 = cik_TA_select1, .counter0_lo = R_034B00_TA_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* cik_TD */ @@ -369,7 +369,7 @@ static struct ac_pc_block_base cik_TD = { .select0 = cik_TD_select0, .select1 = cik_TD_select1, .counter0_lo = R_034C00_TD_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* cik_TCA */ @@ -391,7 +391,7 @@ static struct ac_pc_block_base cik_TCA = { .select0 = cik_TCA_select0, .select1 = cik_TCA_select1, .counter0_lo = R_034E40_TCA_PERFCOUNTER0_LO, - .num_multi = 2, + .num_spm_counters = 2, }; /* cik_TCC */ @@ -413,7 +413,7 @@ static struct ac_pc_block_base cik_TCC = { .select0 = cik_TCC_select0, .select1 = cik_TCC_select1, .counter0_lo = R_034E00_TCC_PERFCOUNTER0_LO, - .num_multi = 2, + .num_spm_counters = 2, }; /* cik_TCP */ @@ -435,7 +435,7 @@ static struct ac_pc_block_base cik_TCP = { .select0 = cik_TCP_select0, .select1 = cik_TCP_select1, .counter0_lo = R_034D00_TCP_PERFCOUNTER0_LO, - .num_multi = 2, + .num_spm_counters = 2, }; /* cik_VGT */ @@ -457,7 +457,7 @@ static struct ac_pc_block_base cik_VGT = { .select0 = cik_VGT_select0, .select1 = cik_VGT_select1, .counter0_lo = R_034240_VGT_PERFCOUNTER0_LO, - .num_multi = 2, + .num_spm_counters = 2, }; /* cik_WD */ @@ -504,7 +504,7 @@ static struct ac_pc_block_base gfx10_CHA = { .select0 = gfx10_CHA_select0, .select1 = gfx10_CHA_select1, .counter0_lo = R_035800_CHA_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* gfx10_CHCG */ @@ -524,7 +524,7 @@ static struct ac_pc_block_base gfx10_CHCG = { .select0 = gfx10_CHCG_select0, .select1 = gfx10_CHCG_select1, .counter0_lo = R_034F20_CHCG_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* gfx10_CHC */ @@ -544,7 +544,7 @@ static struct ac_pc_block_base gfx10_CHC = { .select0 = gfx10_CHC_select0, .select1 = gfx10_CHC_select1, .counter0_lo = R_034F00_CHC_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* gfx10_GCR */ @@ -562,7 +562,7 @@ static struct ac_pc_block_base gfx10_GCR = { .select0 = gfx10_GCR_select0, .select1 = gfx10_GCR_select1, .counter0_lo = R_035480_GCR_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* gfx10_GE */ @@ -593,7 +593,7 @@ static struct ac_pc_block_base gfx10_GE = { .select0 = gfx10_GE_select0, .select1 = gfx10_GE_select1, .counter0_lo = R_034200_GE_PERFCOUNTER0_LO, - .num_multi = 4, + .num_spm_counters = 4, }; /* gfx10_GL1A */ @@ -614,7 +614,7 @@ static struct ac_pc_block_base gfx10_GL1A = { .select0 = gfx10_GL1A_select0, .select1 = gfx10_GL1A_select1, .counter0_lo = R_035700_GL1A_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* gfx10_GL1C */ @@ -635,7 +635,7 @@ static struct ac_pc_block_base gfx10_GL1C = { .select0 = gfx10_GL1C_select0, .select1 = gfx10_GL1C_select1, .counter0_lo = R_034E80_GL1C_PERFCOUNTER0_LO, - .num_multi = 1, + .num_spm_counters = 1, }; /* gfx10_GL2A */ @@ -656,7 +656,7 @@ static struct ac_pc_block_base gfx10_GL2A = { .select0 = gfx10_GL2A_select0, .select1 = gfx10_GL2A_select1, .counter0_lo = R_034E40_GL2A_PERFCOUNTER0_LO, - .num_multi = 2, + .num_spm_counters = 2, }; /* gfx10_GL2C */ @@ -677,7 +677,7 @@ static struct ac_pc_block_base gfx10_GL2C = { .select0 = gfx10_GL2C_select0, .select1 = gfx10_GL2C_select1, .counter0_lo = R_034E00_GL2C_PERFCOUNTER0_LO, - .num_multi = 2, + .num_spm_counters = 2, }; /* gfx10_PA_PH */ @@ -705,7 +705,7 @@ static struct ac_pc_block_base gfx10_PA_PH = { .select0 = gfx10_PA_PH_select0, .select1 = gfx10_PA_PH_select1, .counter0_lo = R_035600_PA_PH_PERFCOUNTER0_LO, - .num_multi = 4, + .num_spm_counters = 4, }; /* gfx10_PA_SU */ @@ -729,7 +729,7 @@ static struct ac_pc_block_base gfx10_PA_SU = { .select0 = gfx10_PA_SU_select0, .select1 = gfx10_PA_SU_select1, .counter0_lo = R_034400_PA_SU_PERFCOUNTER0_LO, - .num_multi = 4, + .num_spm_counters = 4, }; /* gfx10_RLC */ @@ -743,7 +743,7 @@ static struct ac_pc_block_base gfx10_RLC = { .select0 = gfx10_RLC_select0, .counter0_lo = R_035200_RLC_PERFCOUNTER0_LO, - .num_multi = 0, + .num_spm_counters = 0, }; /* gfx10_RMI */ @@ -765,7 +765,7 @@ static struct ac_pc_block_base gfx10_RMI = { .select0 = gfx10_RMI_select0, .select1 = gfx10_RMI_select1, .counter0_lo = R_035300_RMI_PERFCOUNTER0_LO, - .num_multi = 2, + .num_spm_counters = 2, }; /* gfx10_UTCL1 */ @@ -780,7 +780,7 @@ static struct ac_pc_block_base gfx10_UTCL1 = { .select0 = gfx10_UTCL1_select0, .counter0_lo = R_035470_UTCL1_PERFCOUNTER0_LO, - .num_multi = 0, + .num_spm_counters = 0, }; /* Both the number of instances and selectors varies between chips of the same diff --git a/src/amd/common/ac_perfcounter.h b/src/amd/common/ac_perfcounter.h index 69d560f17ab..fc111d02c50 100644 --- a/src/amd/common/ac_perfcounter.h +++ b/src/amd/common/ac_perfcounter.h @@ -62,10 +62,12 @@ struct ac_pc_block_base { unsigned select_or; unsigned *select0; - unsigned *select1; unsigned counter0_lo; unsigned *counters; - unsigned num_multi; + + /* SPM */ + unsigned num_spm_counters; + unsigned *select1; }; struct ac_pc_block_gfxdescr { diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c index 446aad92dce..b553a36b424 100644 --- a/src/gallium/drivers/radeonsi/si_perfcounter.c +++ b/src/gallium/drivers/radeonsi/si_perfcounter.c @@ -116,7 +116,7 @@ static void si_pc_emit_select(struct si_context *sctx, struct ac_pc_block *block radeon_emit(cs, selectors[idx] | regs->select_or); } - for (idx = 0; idx < regs->num_multi; idx++) { + for (idx = 0; idx < regs->num_spm_counters; idx++) { radeon_set_uconfig_reg_seq(cs, regs->select1[idx], 1, false); radeon_emit(cs, 0); }