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anv: ensure pipelines have all state
While we don't need to emit all of the unused mesh/task states when mesh is disabled, if we don't have them we fail some assertions in the difference checks due to the corresponding state being empty. This may happen when going from a mesh pipeline to a non-mesh one, or one that uses task shaders to one that doesn't. It may be possible to avoid having to do this, but I'd rather start from a working state and optimize it later. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25109>
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@ -1755,6 +1755,10 @@ emit_task_state(struct anv_graphics_pipeline *pipeline)
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if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_TASK)) {
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anv_pipeline_emit(pipeline, final.task_control,
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GENX(3DSTATE_TASK_CONTROL), zero);
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anv_pipeline_emit(pipeline, final.task_shader,
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GENX(3DSTATE_TASK_SHADER), zero);
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anv_pipeline_emit(pipeline, final.task_redistrib,
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GENX(3DSTATE_TASK_REDISTRIB), zero);
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return;
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}
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@ -1955,13 +1959,29 @@ genX(graphics_pipeline_emit)(struct anv_graphics_pipeline *pipeline,
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if (device->vk.enabled_extensions.EXT_mesh_shader) {
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anv_pipeline_emit(pipeline, final.mesh_control,
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GENX(3DSTATE_MESH_CONTROL), zero);
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anv_pipeline_emit(pipeline, final.mesh_shader,
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GENX(3DSTATE_MESH_SHADER), zero);
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anv_pipeline_emit(pipeline, final.mesh_distrib,
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GENX(3DSTATE_MESH_DISTRIB), zero);
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anv_pipeline_emit(pipeline, final.clip_mesh,
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GENX(3DSTATE_CLIP_MESH), zero);
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anv_pipeline_emit(pipeline, final.sbe_mesh,
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GENX(3DSTATE_SBE_MESH), zero);
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anv_pipeline_emit(pipeline, final.task_control,
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GENX(3DSTATE_TASK_CONTROL), zero);
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anv_pipeline_emit(pipeline, final.task_shader,
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GENX(3DSTATE_TASK_SHADER), zero);
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anv_pipeline_emit(pipeline, final.task_redistrib,
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GENX(3DSTATE_TASK_REDISTRIB), zero);
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}
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#endif
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} else {
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assert(anv_pipeline_is_mesh(pipeline));
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anv_pipeline_emit(pipeline, final.vf_sgvs, GENX(3DSTATE_VF_SGVS), sgvs);
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#if GFX_VER >= 11
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anv_pipeline_emit(pipeline, final.vf_sgvs_2, GENX(3DSTATE_VF_SGVS_2), sgvs);
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#endif
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anv_pipeline_emit(pipeline, final.vs, GENX(3DSTATE_VS), vs);
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anv_pipeline_emit(pipeline, final.hs, GENX(3DSTATE_HS), hs);
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anv_pipeline_emit(pipeline, final.ds, GENX(3DSTATE_DS), ds);
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