fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-22 15:40:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

radeonsi: fix user fence space when MCBP is enabled

Browse source 
When MCBP is enabled, IB maybe preempted which will also update
the preempted fence field of the user fence. So we need to reserve
enough space for each user fence.

Fixes: 89d2dac554 "radeonsi: enable preemption if the kernel enabled it"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6577>
This commit is contained in:
Qiang Yu 2020-09-03 11:30:28 +08:00 • committed by Marge Bot
parent c638301b42
commit 3d5bed0e88
1 changed files with 7 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

8
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
View file

@ -1683,8 +1683,14 @@ finalize:
/* Success. */ /* Success. */
uint64_t *user_fence = NULL; uint64_t *user_fence = NULL;
/* Need to reserve 4 QWORD for user fence:
* QWORD[0]: completed fence
* QWORD[1]: preempted fence
* QWORD[2]: reset fence
* QWORD[3]: preempted then reset
**/
if (has_user_fence) if (has_user_fence)
user_fence = acs->ctx->user_fence_cpu_address_base + acs->ring_type; user_fence = acs->ctx->user_fence_cpu_address_base + acs->ring_type * 4;
amdgpu_fence_submitted(cs->fence, seq_no, user_fence); amdgpu_fence_submitted(cs->fence, seq_no, user_fence);
} }