diff --git a/src/intel/compiler/brw/brw_generator.cpp b/src/intel/compiler/brw/brw_generator.cpp
index d7da994ac86..c3904cd7f7f 100644
--- a/src/intel/compiler/brw/brw_generator.cpp
+++ b/src/intel/compiler/brw/brw_generator.cpp
@@ -1457,6 +1457,7 @@ brw_generator::generate_code(const brw_shader &s,
       stats->non_ssa_regs_after_nir = shader_stats.non_ssa_registers_after_nir;
       stats->source_hash = prog_data->source_hash;
       stats->grf_registers = devinfo->ver >= 30 ? s.grf_used : 0;
+      stats->scheduler_mode = shader_stats.scheduler_mode;
 
       /* Report the max dispatch width only on the smallest SIMD variant.
        *
diff --git a/src/util/shader_stats.xml b/src/util/shader_stats.xml
index 7c764520a69..d7c8796749a 100644
--- a/src/util/shader_stats.xml
+++ b/src/util/shader_stats.xml
@@ -185,6 +185,9 @@
          <stat name="Source hash" hash="true">
             Hash generated from shader source.
          </stat>
+         <stat name="Scheduler mode" type="str">
+            Scheduling mode selected for this binary.
+         </stat>
        </isa>
     </family>