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radeonsi: fix vertex buffer address computation with full 64-bit addresses
(cherry picked from commit 2a47660754)
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1 changed files with 3 additions and 3 deletions
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@ -1066,9 +1066,9 @@ bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
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continue;
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}
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int offset = (int)vb->buffer_offset + (int)velems->src_offset[i];
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int64_t va = (int64_t)rbuffer->gpu_address + offset;
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assert(va > 0);
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int64_t offset = (int64_t)((int)vb->buffer_offset) +
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velems->src_offset[i];
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uint64_t va = rbuffer->gpu_address + offset;
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int64_t num_records = (int64_t)rbuffer->b.b.width0 - offset;
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if (sctx->b.chip_class != VI && vb->stride) {
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