diff --git a/src/amd/common/ac_nir.c b/src/amd/common/ac_nir.c index 7ddc3697d71..32b5b3b8499 100644 --- a/src/amd/common/ac_nir.c +++ b/src/amd/common/ac_nir.c @@ -521,9 +521,7 @@ ac_nir_export_parameters(nir_builder *b, const uint8_t *param_offsets, uint64_t outputs_written, uint16_t outputs_written_16bit, - nir_def *(*outputs)[4], - nir_def *(*outputs_16bit_lo)[4], - nir_def *(*outputs_16bit_hi)[4]) + ac_nir_prerast_out *out) { uint32_t exported_params = 0; @@ -534,7 +532,7 @@ ac_nir_export_parameters(nir_builder *b, uint32_t write_mask = 0; for (int i = 0; i < 4; i++) { - if (outputs[slot][i]) + if (out->outputs[slot][i]) write_mask |= BITFIELD_BIT(i); } @@ -550,7 +548,7 @@ ac_nir_export_parameters(nir_builder *b, continue; nir_export_amd( - b, get_export_output(b, outputs[slot]), + b, get_export_output(b, out->outputs[slot]), .base = V_008DFC_SQ_EXP_PARAM + offset, .write_mask = write_mask); exported_params |= BITFIELD_BIT(offset); @@ -563,7 +561,7 @@ ac_nir_export_parameters(nir_builder *b, uint32_t write_mask = 0; for (int i = 0; i < 4; i++) { - if (outputs_16bit_lo[slot][i] || outputs_16bit_hi[slot][i]) + if (out->outputs_16bit_lo[slot][i] || out->outputs_16bit_hi[slot][i]) write_mask |= BITFIELD_BIT(i); } @@ -581,8 +579,8 @@ ac_nir_export_parameters(nir_builder *b, nir_def *vec[4]; nir_def *undef = nir_undef(b, 1, 16); for (int i = 0; i < 4; i++) { - nir_def *lo = outputs_16bit_lo[slot][i] ? outputs_16bit_lo[slot][i] : undef; - nir_def *hi = outputs_16bit_hi[slot][i] ? outputs_16bit_hi[slot][i] : undef; + nir_def *lo = out->outputs_16bit_lo[slot][i] ? out->outputs_16bit_lo[slot][i] : undef; + nir_def *hi = out->outputs_16bit_hi[slot][i] ? out->outputs_16bit_hi[slot][i] : undef; vec[i] = nir_pack_32_2x16_split(b, lo, hi); } @@ -887,9 +885,7 @@ ac_nir_create_gs_copy_shader(const nir_shader *gs_nir, ac_nir_export_parameters(&b, param_offsets, b.shader->info.outputs_written, b.shader->info.outputs_written_16bit, - out.outputs, - out.outputs_16bit_lo, - out.outputs_16bit_hi); + &out); } } @@ -976,9 +972,7 @@ ac_nir_lower_legacy_vs(nir_shader *nir, ac_nir_export_parameters(&b, param_offsets, nir->info.outputs_written, nir->info.outputs_written_16bit, - out.outputs, - out.outputs_16bit_lo, - out.outputs_16bit_hi); + &out); } nir_metadata_preserve(impl, preserved); diff --git a/src/amd/common/ac_nir_helpers.h b/src/amd/common/ac_nir_helpers.h index 6926af47f6a..7b534b3070e 100644 --- a/src/amd/common/ac_nir_helpers.h +++ b/src/amd/common/ac_nir_helpers.h @@ -107,9 +107,7 @@ ac_nir_export_parameters(nir_builder *b, const uint8_t *param_offsets, uint64_t outputs_written, uint16_t outputs_written_16bit, - nir_def *(*outputs)[4], - nir_def *(*outputs_16bit_lo)[4], - nir_def *(*outputs_16bit_hi)[4]); + ac_nir_prerast_out *out); nir_def * ac_nir_calc_io_off(nir_builder *b, diff --git a/src/amd/common/ac_nir_lower_ngg.c b/src/amd/common/ac_nir_lower_ngg.c index addfe08a701..bb2b1e58871 100644 --- a/src/amd/common/ac_nir_lower_ngg.c +++ b/src/amd/common/ac_nir_lower_ngg.c @@ -635,9 +635,12 @@ emit_ngg_nogs_prim_export(nir_builder *b, lower_ngg_nogs_state *s, nir_def *arg) const uint8_t offset = s->options->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID]; nir_def *prim_id = nir_load_primitive_id(b); nir_def *undef = nir_undef(b, 1, 32); - nir_def *param_components[4] = { prim_id, undef, undef, undef }; + ac_nir_prerast_out out = { + .infos = {{.components_mask = 1}}, + .outputs = {{prim_id, undef, undef, undef}} + }; - ac_nir_export_parameters(b, &offset, 1, 0, ¶m_components, NULL, NULL); + ac_nir_export_parameters(b, &offset, 1, 0, &out); } } nir_pop_if(b, if_gs_thread); @@ -2691,8 +2694,7 @@ nogs_export_vertex_params(nir_builder *b, nir_function_impl *impl, ac_nir_export_parameters(b, s->options->vs_output_param_offset, b->shader->info.outputs_written, b->shader->info.outputs_written_16bit, - s->out.outputs, s->out.outputs_16bit_lo, - s->out.outputs_16bit_hi); + &s->out); } } @@ -3382,8 +3384,7 @@ ngg_gs_export_vertices(nir_builder *b, nir_def *max_num_out_vtx, nir_def *tid_in ac_nir_export_parameters(b, s->options->vs_output_param_offset, b->shader->info.outputs_written, b->shader->info.outputs_written_16bit, - s->out.outputs, s->out.outputs_16bit_lo, - s->out.outputs_16bit_hi); + &s->out); } } @@ -4635,8 +4636,7 @@ emit_ms_vertex(nir_builder *b, nir_def *index, nir_def *row, bool exports, bool * (On GFX11 they are already stored in the attribute ring.) */ if (s->has_param_exports && s->gfx_level == GFX10_3) { - ac_nir_export_parameters(b, s->vs_output_param_offset, per_vertex_outputs, 0, s->out.outputs, - NULL, NULL); + ac_nir_export_parameters(b, s->vs_output_param_offset, per_vertex_outputs, 0, &s->out); } /* GFX11+: also store special outputs to the attribute ring so PS can load them. */ @@ -4672,8 +4672,7 @@ emit_ms_primitive(nir_builder *b, nir_def *index, nir_def *row, bool exports, bo * (On GFX11 they are already stored in the attribute ring.) */ if (s->has_param_exports && s->gfx_level == GFX10_3) { - ac_nir_export_parameters(b, s->vs_output_param_offset, per_primitive_outputs, 0, - s->out.outputs, NULL, NULL); + ac_nir_export_parameters(b, s->vs_output_param_offset, per_primitive_outputs, 0, &s->out); } /* GFX11+: also store special outputs to the attribute ring so PS can load them. */