pan/lib: Adapt CRC calculation to align to 64x64 on v12+

The meta tile size changed on v12+ to 64x64 and the same apply to the
checksum region size.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34032>
This commit is contained in:
Mary Guillemard 2025-02-19 15:20:22 +00:00
parent c191b36456
commit 3cdc39ee16
2 changed files with 20 additions and 12 deletions

View file

@ -26,6 +26,7 @@
#include "util/log.h"
#include "util/macros.h"
#include "util/u_math.h"
#include "pan_props.h"
#include "pan_texture.h"
/*
@ -399,24 +400,29 @@ format_minimum_alignment(unsigned arch, enum pipe_format format, uint64_t mod)
* Computes sizes for checksumming, which is 8 bytes per 16x16 tile.
* Checksumming is believed to be a CRC variant (CRC64 based on the size?).
* This feature is also known as "transaction elimination".
* CRC values are prefetched by 32x32 regions so size needs to be aligned.
* CRC values are prefetched by 32x32 (64x64 on v12+) regions so size needs to
* be aligned.
*/
#define CHECKSUM_TILE_WIDTH 16
#define CHECKSUM_TILE_HEIGHT 16
#define CHECKSUM_REGION_SIZE 32
#define CHECKSUM_X_TILE_PER_REGION (CHECKSUM_REGION_SIZE / CHECKSUM_TILE_WIDTH)
#define CHECKSUM_Y_TILE_PER_REGION (CHECKSUM_REGION_SIZE / CHECKSUM_TILE_HEIGHT)
#define CHECKSUM_BYTES_PER_TILE 8
#define CHECKSUM_TILE_WIDTH 16
#define CHECKSUM_TILE_HEIGHT 16
#define CHECKSUM_BYTES_PER_TILE 8
unsigned
panfrost_compute_checksum_size(struct pan_image_slice_layout *slice,
panfrost_compute_checksum_size(unsigned arch,
struct pan_image_slice_layout *slice,
unsigned width, unsigned height)
{
unsigned checksum_region_size = panfrost_meta_tile_size(arch);
unsigned checksum_x_tile_per_region =
(checksum_region_size / CHECKSUM_TILE_WIDTH);
unsigned checksum_y_tile_per_region =
(checksum_region_size / CHECKSUM_TILE_HEIGHT);
unsigned tile_count_x =
CHECKSUM_X_TILE_PER_REGION * DIV_ROUND_UP(width, CHECKSUM_REGION_SIZE);
checksum_x_tile_per_region * DIV_ROUND_UP(width, checksum_region_size);
unsigned tile_count_y =
CHECKSUM_Y_TILE_PER_REGION * DIV_ROUND_UP(height, CHECKSUM_REGION_SIZE);
checksum_y_tile_per_region * DIV_ROUND_UP(height, checksum_region_size);
slice->crc.stride = tile_count_x * CHECKSUM_BYTES_PER_TILE;
@ -651,7 +657,8 @@ pan_image_layout_init(unsigned arch, struct pan_image_layout *layout,
/* Add a checksum region if necessary */
if (layout->crc) {
slice->crc.size = panfrost_compute_checksum_size(slice, width, height);
slice->crc.size =
panfrost_compute_checksum_size(arch, slice, width, height);
slice->crc.offset = offset;
offset += slice->crc.size;

View file

@ -252,7 +252,8 @@ pan_image_view_get_zs_plane(const struct pan_image_view *iview)
return pan_image_view_get_plane(iview, 0);
}
unsigned panfrost_compute_checksum_size(struct pan_image_slice_layout *slice,
unsigned panfrost_compute_checksum_size(unsigned arch,
struct pan_image_slice_layout *slice,
unsigned width, unsigned height);
/* AFBC format mode. The ordering is intended to match the Valhall hardware enum