diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index 38c8be7a0bb..bdc1dc67a01 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -6503,6 +6503,7 @@ enum anv_vid_mem_av1_types { ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_Y, ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_U, ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_V, + ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_ALIGNMENT_RW, ANV_VID_MEM_AV1_CDF_DEFAULTS_0, ANV_VID_MEM_AV1_CDF_DEFAULTS_1, ANV_VID_MEM_AV1_CDF_DEFAULTS_2, diff --git a/src/intel/vulkan/anv_video.c b/src/intel/vulkan/anv_video.c index 2d193775c12..74db53397d3 100644 --- a/src/intel/vulkan/anv_video.c +++ b/src/intel/vulkan/anv_video.c @@ -676,6 +676,7 @@ static const uint8_t av1_buffer_size[ANV_VID_MEM_AV1_MAX][4] = { { 9 , 17 , 11 , 22 }, /* lrTileColYBuf, */ { 5 , 9 , 6 , 12 }, /* lrTileColUBuf, */ { 5 , 9 , 6 , 12 }, /* lrTileColVBuf, */ + { 4, 8 , 5 , 10 }, /* lrTileColAlignBuffer, */ }; static const uint8_t av1_buffer_size_ext[ANV_VID_MEM_AV1_MAX][4] = { @@ -710,6 +711,7 @@ static const uint8_t av1_buffer_size_ext[ANV_VID_MEM_AV1_MAX][4] = { { 2 , 2 , 2 , 2 }, /* lrTileColYBuf, */ { 1 , 1 , 1 , 1 }, /* lrTileColUBuf, */ { 1 , 1 , 1 , 1 }, /* lrTileColVBuf, */ + { 1, 1 , 1 , 1 }, /* lrTileColAlignBuffer, */ }; const uint32_t av1_mi_size_log2 = 2; @@ -810,6 +812,7 @@ get_av1_video_session_mem_reqs(struct anv_video_session *vid, case ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_Y: case ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_U: case ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_V: + case ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_ALIGNMENT_RW: case ANV_VID_MEM_AV1_LOOP_RESTORATION_META_TILE_COLUMN: buffer_size = height_in_sb * av1_buffer_size[mem][buf_size_idx] + av1_buffer_size_ext[mem][buf_size_idx]; diff --git a/src/intel/vulkan/genX_cmd_video.c b/src/intel/vulkan/genX_cmd_video.c index b7bce348bc9..b664f24a870 100644 --- a/src/intel/vulkan/genX_cmd_video.c +++ b/src/intel/vulkan/genX_cmd_video.c @@ -1857,6 +1857,15 @@ anv_av1_decode_video_tile(struct anv_cmd_buffer *cmd_buffer, buf.LoopRestorationFilterTileColumnVBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { .MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_V].mem->bo, 0), }; +#if GFX_VER >= 20 + buf.LoopRestorationFilterTileColumnAlignmentReadWriteBufferAddress = (struct anv_address) { + vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_ALIGNMENT_RW].mem->bo, + vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_ALIGNMENT_RW].offset + }; + buf.LoopRestorationFilterTileColumnAlignmentReadWriteBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_LOOP_RESTORATION_FILTER_TILE_COLUMN_ALIGNMENT_RW].mem->bo, 0), + }; +#endif struct anv_bo *ref_bo = NULL; struct anv_bo *collocated_bo = NULL; @@ -1944,6 +1953,43 @@ anv_av1_decode_video_tile(struct anv_cmd_buffer *cmd_buffer, buf.DecodedBlockDataStreamoutBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { .MOCS = anv_mocs(cmd_buffer->device, vid->vid_mem[ANV_VID_MEM_AV1_DBD_BUFFER].mem->bo, 0), }; +#if GFX_VERx10 >= 125 + buf.OriginalUncompressedPictureSourceBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + }; + buf.DownscaledUncompressedPictureSourceBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + }; + buf.TileSizeStreamoutBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + }; + buf.TileStatisticsStreamoutBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + }; + buf.CUStreamoutBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + }; + buf.SSELineReadWriteBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + }; + buf.SSETileLineReadWriteBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + }; + buf.PostCDEFPixelsBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + }; +#endif +#if GFX_VER >= 20 + buf.FilmGrainInjectedOutputFrameBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + }; + buf.FilmGrainSampleTemplateAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + }; + buf.FilmGrainTileColumnDataReadWriteBufferAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + }; +#endif }; anv_batch_emit(&cmd_buffer->batch, GENX(AVP_IND_OBJ_BASE_ADDR_STATE), ind) { @@ -1953,11 +1999,9 @@ anv_av1_decode_video_tile(struct anv_cmd_buffer *cmd_buffer, .MOCS = anv_mocs(cmd_buffer->device, src_buffer->address.bo, 0), }; #if GFX_VERx10 >= 125 - /* FIXME. - ind.AVPIndirectCUObjectAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { - .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), + ind.AVPIndirectCUObjectMemoryAddressAttributes = (struct GENX(MEMORYADDRESSATTRIBUTES)) { + .MOCS = anv_mocs(cmd_buffer->device, NULL, 0), }; - */ #endif }