From 3c3f4a1235ac6c74e156c29bc921d7bde802c1c4 Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Sat, 14 Dec 2024 14:44:47 -0800 Subject: [PATCH] intel/brw: Rename brw_inst to brw_eu_inst Free the old name for the BRW IR instruction. Acked-by: Sagar Ghuge Reviewed-by: Kenneth Graunke Part-of: --- src/intel/compiler/brw_asm.c | 6 +- src/intel/compiler/brw_asm_tool.c | 6 +- src/intel/compiler/brw_disasm.c | 38 +++--- src/intel/compiler/brw_disasm.h | 4 +- src/intel/compiler/brw_eu.c | 28 ++--- src/intel/compiler/brw_eu.h | 52 ++++---- src/intel/compiler/brw_eu_compact.c | 92 +++++++------- src/intel/compiler/brw_eu_emit.c | 156 ++++++++++++------------ src/intel/compiler/brw_eu_inst.h | 130 ++++++++++---------- src/intel/compiler/brw_eu_validate.c | 14 +-- src/intel/compiler/brw_fs_generator.cpp | 16 +-- src/intel/compiler/brw_gram.y | 2 +- src/intel/compiler/test_eu_compact.cpp | 16 +-- src/intel/compiler/test_eu_validate.cpp | 4 +- 14 files changed, 283 insertions(+), 281 deletions(-) diff --git a/src/intel/compiler/brw_asm.c b/src/intel/compiler/brw_asm.c index 0eb0d4a5987..4c6c8b38b49 100644 --- a/src/intel/compiler/brw_asm.c +++ b/src/intel/compiler/brw_asm.c @@ -30,9 +30,9 @@ i965_postprocess_labels() LIST_FOR_EACH_ENTRY(tlabel, &target_labels, link) { LIST_FOR_EACH_ENTRY_SAFE(ilabel, s, &instr_labels, link) { if (!strcmp(tlabel->name, ilabel->name)) { - brw_inst *inst = store + ilabel->offset; + brw_eu_inst *inst = store + ilabel->offset; - int relative_offset = (tlabel->offset - ilabel->offset) / sizeof(brw_inst); + int relative_offset = (tlabel->offset - ilabel->offset) / sizeof(brw_eu_inst); relative_offset *= to_bytes_scale; unsigned opcode = brw_inst_opcode(p->isa, inst); @@ -143,7 +143,7 @@ brw_assemble(void *mem_ctx, const struct intel_device_info *devinfo, /* Adjust bin size to account for compacted instructions. */ int compacted = 0; for (int i = 0; i < result.inst_count; i++) { - const brw_inst *inst = result.bin + i; + const brw_eu_inst *inst = result.bin + i; if (brw_inst_cmpt_control(devinfo, inst)) compacted++; } diff --git a/src/intel/compiler/brw_asm_tool.c b/src/intel/compiler/brw_asm_tool.c index 0dd97306bcf..ee013052ea9 100644 --- a/src/intel/compiler/brw_asm_tool.c +++ b/src/intel/compiler/brw_asm_tool.c @@ -59,7 +59,7 @@ print_help(const char *progname, FILE *file) } static uint32_t -get_dword(const brw_inst *inst, int idx) +get_dword(const brw_eu_inst *inst, int idx) { uint32_t dword; memcpy(&dword, (char *)inst + 4 * idx, sizeof(dword)); @@ -67,7 +67,7 @@ get_dword(const brw_inst *inst, int idx) } static void -print_instruction(FILE *output, bool compact, const brw_inst *instruction) +print_instruction(FILE *output, bool compact, const brw_eu_inst *instruction) { int byte_limit; @@ -238,7 +238,7 @@ int main(int argc, char **argv) fprintf(output, "{\n"); for (int i = 0; i < r.inst_count; i++) { - const brw_inst *insn = r.bin + offset; + const brw_eu_inst *insn = r.bin + offset; bool compacted = false; if (compact && brw_inst_cmpt_control(devinfo, insn)) { diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index 8659dec8993..331340a8724 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -869,7 +869,7 @@ reg(FILE *file, unsigned _reg_file, unsigned _reg_nr) } static int -dest(FILE *file, const struct brw_isa_info *isa, const brw_inst *inst) +dest(FILE *file, const struct brw_isa_info *isa, const brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; enum brw_reg_type type = brw_inst_dst_type(devinfo, inst); @@ -951,7 +951,7 @@ dest(FILE *file, const struct brw_isa_info *isa, const brw_inst *inst) static int dest_3src(FILE *file, const struct intel_device_info *devinfo, - const brw_inst *inst) + const brw_eu_inst *inst) { bool is_align1 = brw_inst_3src_access_mode(devinfo, inst) == BRW_ALIGN_1; int err = 0; @@ -997,7 +997,7 @@ dest_3src(FILE *file, const struct intel_device_info *devinfo, static int dest_dpas_3src(FILE *file, const struct intel_device_info *devinfo, - const brw_inst *inst) + const brw_eu_inst *inst) { uint32_t reg_file = brw_inst_dpas_3src_dst_reg_file(devinfo, inst); @@ -1243,7 +1243,7 @@ implied_width(enum brw_vertical_stride _vert_stride, static int src0_3src(FILE *file, const struct intel_device_info *devinfo, - const brw_inst *inst) + const brw_eu_inst *inst) { int err = 0; unsigned reg_nr, subreg_nr; @@ -1322,7 +1322,7 @@ src0_3src(FILE *file, const struct intel_device_info *devinfo, static int src1_3src(FILE *file, const struct intel_device_info *devinfo, - const brw_inst *inst) + const brw_eu_inst *inst) { int err = 0; unsigned reg_nr, subreg_nr; @@ -1388,7 +1388,7 @@ src1_3src(FILE *file, const struct intel_device_info *devinfo, static int src2_3src(FILE *file, const struct intel_device_info *devinfo, - const brw_inst *inst) + const brw_eu_inst *inst) { int err = 0; unsigned reg_nr, subreg_nr; @@ -1471,7 +1471,7 @@ src2_3src(FILE *file, const struct intel_device_info *devinfo, static int src0_dpas_3src(FILE *file, const struct intel_device_info *devinfo, - const brw_inst *inst) + const brw_eu_inst *inst) { uint32_t reg_file = brw_inst_dpas_3src_src0_reg_file(devinfo, inst); @@ -1495,7 +1495,7 @@ src0_dpas_3src(FILE *file, const struct intel_device_info *devinfo, static int src1_dpas_3src(FILE *file, const struct intel_device_info *devinfo, - const brw_inst *inst) + const brw_eu_inst *inst) { uint32_t reg_file = brw_inst_dpas_3src_src1_reg_file(devinfo, inst); @@ -1519,7 +1519,7 @@ src1_dpas_3src(FILE *file, const struct intel_device_info *devinfo, static int src2_dpas_3src(FILE *file, const struct intel_device_info *devinfo, - const brw_inst *inst) + const brw_eu_inst *inst) { uint32_t reg_file = brw_inst_dpas_3src_src2_reg_file(devinfo, inst); @@ -1543,7 +1543,7 @@ src2_dpas_3src(FILE *file, const struct intel_device_info *devinfo, static int imm(FILE *file, const struct brw_isa_info *isa, enum brw_reg_type type, - const brw_inst *inst) + const brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; @@ -1661,7 +1661,7 @@ src_send_desc_ia(FILE *file, } static int -src0(FILE *file, const struct brw_isa_info *isa, const brw_inst *inst) +src0(FILE *file, const struct brw_isa_info *isa, const brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; @@ -1746,7 +1746,7 @@ src0(FILE *file, const struct brw_isa_info *isa, const brw_inst *inst) } static int -src1(FILE *file, const struct brw_isa_info *isa, const brw_inst *inst) +src1(FILE *file, const struct brw_isa_info *isa, const brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; @@ -1811,7 +1811,7 @@ src1(FILE *file, const struct brw_isa_info *isa, const brw_inst *inst) static int qtr_ctrl(FILE *file, const struct intel_device_info *devinfo, - const brw_inst *inst) + const brw_eu_inst *inst) { int qtr_ctl = brw_inst_qtr_control(devinfo, inst); int exec_size = 1 << brw_inst_exec_size(devinfo, inst); @@ -1846,7 +1846,7 @@ qtr_ctrl(FILE *file, const struct intel_device_info *devinfo, static bool inst_has_type(const struct brw_isa_info *isa, - const brw_inst *inst, + const brw_eu_inst *inst, enum brw_reg_type type) { const struct intel_device_info *devinfo = isa->devinfo; @@ -1871,7 +1871,7 @@ inst_has_type(const struct brw_isa_info *isa, } static int -swsb(FILE *file, const struct brw_isa_info *isa, const brw_inst *inst) +swsb(FILE *file, const struct brw_isa_info *isa, const brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; const enum opcode opcode = brw_inst_opcode(isa, inst); @@ -1903,7 +1903,7 @@ static __attribute__((__unused__)) int brw_disassemble_imm(const struct brw_isa_info *isa, uint32_t dw3, uint32_t dw2, uint32_t dw1, uint32_t dw0) { - brw_inst inst; + brw_eu_inst inst; inst.data[0] = (((uint64_t) dw1) << 32) | ((uint64_t) dw0); inst.data[1] = (((uint64_t) dw3) << 32) | ((uint64_t) dw2); return brw_disassemble_inst(stderr, isa, &inst, false, 0, NULL); @@ -1916,7 +1916,7 @@ write_label(FILE *file, const struct intel_device_info *devinfo, int offset, int jump) { if (root_label != NULL) { - int to_bytes_scale = sizeof(brw_inst) / brw_jump_scale(devinfo); + int to_bytes_scale = sizeof(brw_eu_inst) / brw_jump_scale(devinfo); const struct brw_label *label = brw_find_label(root_label, offset + jump * to_bytes_scale); if (label != NULL) { @@ -1971,7 +1971,7 @@ brw_sfid_is_lsc(unsigned sfid) int brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, - const brw_inst *inst, bool is_compacted, + const brw_eu_inst *inst, bool is_compacted, int offset, const struct brw_label *root_label) { const struct intel_device_info *devinfo = isa->devinfo; @@ -2614,7 +2614,7 @@ brw_disassemble_find_end(const struct brw_isa_info *isa, /* This loop exits when send-with-EOT or when opcode is 0 */ while (true) { - const brw_inst *insn = assembly + offset; + const brw_eu_inst *insn = assembly + offset; if (brw_inst_cmpt_control(devinfo, insn)) { offset += 8; diff --git a/src/intel/compiler/brw_disasm.h b/src/intel/compiler/brw_disasm.h index 76f76bc4620..5bc729e932d 100644 --- a/src/intel/compiler/brw_disasm.h +++ b/src/intel/compiler/brw_disasm.h @@ -13,12 +13,12 @@ extern "C" { #endif struct brw_isa_info; -struct brw_inst; +struct brw_eu_inst; const struct brw_label *brw_find_label(const struct brw_label *root, int offset); void brw_create_label(struct brw_label **labels, int offset, void *mem_ctx); int brw_disassemble_inst(FILE *file, const struct brw_isa_info *isa, - const struct brw_inst *inst, bool is_compacted, + const struct brw_eu_inst *inst, bool is_compacted, int offset, const struct brw_label *root_label); const struct brw_label *brw_label_assembly(const struct brw_isa_info *isa, diff --git a/src/intel/compiler/brw_eu.c b/src/intel/compiler/brw_eu.c index 0e9f24e3026..f9358ed25d7 100644 --- a/src/intel/compiler/brw_eu.c +++ b/src/intel/compiler/brw_eu.c @@ -188,7 +188,7 @@ void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode ) */ void brw_inst_set_group(const struct intel_device_info *devinfo, - brw_inst *inst, unsigned group) + brw_eu_inst *inst, unsigned group) { if (devinfo->ver >= 20) { assert(group % 8 == 0 && group < 32); @@ -258,7 +258,7 @@ brw_init_codegen(const struct brw_isa_info *isa, * until out of memory. */ p->store_size = 1024; - p->store = rzalloc_array(mem_ctx, brw_inst, p->store_size); + p->store = rzalloc_array(mem_ctx, brw_eu_inst, p->store_size); p->nr_insn = 0; p->current = p->stack; memset(p->current, 0, sizeof(p->current[0])); @@ -363,12 +363,12 @@ bool brw_try_override_assembly(struct brw_codegen *p, int start_offset, return false; } - p->nr_insn -= (p->next_insn_offset - start_offset) / sizeof(brw_inst); - p->nr_insn += sb.st_size / sizeof(brw_inst); + p->nr_insn -= (p->next_insn_offset - start_offset) / sizeof(brw_eu_inst); + p->nr_insn += sb.st_size / sizeof(brw_eu_inst); p->next_insn_offset = start_offset + sb.st_size; - p->store_size = (start_offset + sb.st_size) / sizeof(brw_inst); - p->store = (brw_inst *)reralloc_size(p->mem_ctx, p->store, p->next_insn_offset); + p->store_size = (start_offset + sb.st_size) / sizeof(brw_eu_inst); + p->store = (brw_eu_inst *)reralloc_size(p->mem_ctx, p->store, p->next_insn_offset); assert(p->store); ssize_t ret = read(fd, (char *)p->store + start_offset, sb.st_size); @@ -442,11 +442,11 @@ brw_label_assembly(const struct brw_isa_info *isa, struct brw_label *root_label = NULL; - int to_bytes_scale = sizeof(brw_inst) / brw_jump_scale(devinfo); + int to_bytes_scale = sizeof(brw_eu_inst) / brw_jump_scale(devinfo); for (int offset = start; offset < end;) { - const brw_inst *inst = (const brw_inst *) ((const char *) assembly + offset); - brw_inst uncompacted; + const brw_eu_inst *inst = (const brw_eu_inst *) ((const char *) assembly + offset); + brw_eu_inst uncompacted; bool is_compact = brw_inst_cmpt_control(devinfo, inst); @@ -471,7 +471,7 @@ brw_label_assembly(const struct brw_isa_info *isa, if (is_compact) { offset += sizeof(brw_compact_inst); } else { - offset += sizeof(brw_inst); + offset += sizeof(brw_eu_inst); } } @@ -501,8 +501,8 @@ brw_disassemble(const struct brw_isa_info *isa, bool dump_hex = INTEL_DEBUG(DEBUG_HEX); for (int offset = start; offset < end;) { - const brw_inst *insn = (const brw_inst *)((char *)assembly + offset); - brw_inst uncompacted; + const brw_eu_inst *insn = (const brw_eu_inst *)((char *)assembly + offset); + brw_eu_inst uncompacted; if (root_label != NULL) { const struct brw_label *label = brw_find_label(root_label, offset); @@ -553,7 +553,7 @@ brw_disassemble(const struct brw_isa_info *isa, if (compacted) { offset += sizeof(brw_compact_inst); } else { - offset += sizeof(brw_inst); + offset += sizeof(brw_eu_inst); } } } @@ -704,7 +704,7 @@ brw_opcode_desc_from_hw(const struct brw_isa_info *isa, unsigned hw) unsigned brw_num_sources_from_inst(const struct brw_isa_info *isa, - const brw_inst *inst) + const brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; const struct opcode_desc *desc = diff --git a/src/intel/compiler/brw_eu.h b/src/intel/compiler/brw_eu.h index e36160906fd..eac3a052add 100644 --- a/src/intel/compiler/brw_eu.h +++ b/src/intel/compiler/brw_eu.h @@ -87,7 +87,7 @@ struct brw_insn_state { #define brw_last_inst (&p->store[p->nr_insn - 1]) struct brw_codegen { - brw_inst *store; + brw_eu_inst *store; int store_size; unsigned nr_insn; unsigned int next_insn_offset; @@ -143,7 +143,7 @@ void brw_set_default_mask_control( struct brw_codegen *p, unsigned value ); void brw_set_default_saturate( struct brw_codegen *p, bool enable ); void brw_set_default_access_mode( struct brw_codegen *p, unsigned access_mode ); void brw_inst_set_group(const struct intel_device_info *devinfo, - brw_inst *inst, unsigned group); + brw_eu_inst *inst, unsigned group); void brw_set_default_group(struct brw_codegen *p, unsigned group); void brw_set_default_predicate_control(struct brw_codegen *p, enum brw_predicate pc); void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse); @@ -170,28 +170,28 @@ bool brw_try_override_assembly(struct brw_codegen *p, int start_offset, void brw_realign(struct brw_codegen *p, unsigned alignment); int brw_append_data(struct brw_codegen *p, void *data, unsigned size, unsigned alignment); -brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode); +brw_eu_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode); void brw_add_reloc(struct brw_codegen *p, uint32_t id, enum brw_shader_reloc_type type, uint32_t offset, uint32_t delta); -void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest); -void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg); +void brw_set_dest(struct brw_codegen *p, brw_eu_inst *insn, struct brw_reg dest); +void brw_set_src0(struct brw_codegen *p, brw_eu_inst *insn, struct brw_reg reg); /* Helpers for regular instructions: */ #define ALU1(OP) \ -brw_inst *brw_##OP(struct brw_codegen *p, \ +brw_eu_inst *brw_##OP(struct brw_codegen *p, \ struct brw_reg dest, \ struct brw_reg src0); #define ALU2(OP) \ -brw_inst *brw_##OP(struct brw_codegen *p, \ +brw_eu_inst *brw_##OP(struct brw_codegen *p, \ struct brw_reg dest, \ struct brw_reg src0, \ struct brw_reg src1); #define ALU3(OP) \ -brw_inst *brw_##OP(struct brw_codegen *p, \ +brw_eu_inst *brw_##OP(struct brw_codegen *p, \ struct brw_reg dest, \ struct brw_reg src0, \ struct brw_reg src1, \ @@ -1472,24 +1472,24 @@ void brw_barrier(struct brw_codegen *p, struct brw_reg src); /* If/else/endif. Works by manipulating the execution flags on each * channel. */ -brw_inst *brw_IF(struct brw_codegen *p, unsigned execute_size); +brw_eu_inst *brw_IF(struct brw_codegen *p, unsigned execute_size); void brw_ELSE(struct brw_codegen *p); void brw_ENDIF(struct brw_codegen *p); /* DO/WHILE loops: */ -brw_inst *brw_DO(struct brw_codegen *p, unsigned execute_size); +brw_eu_inst *brw_DO(struct brw_codegen *p, unsigned execute_size); -brw_inst *brw_WHILE(struct brw_codegen *p); +brw_eu_inst *brw_WHILE(struct brw_codegen *p); -brw_inst *brw_BREAK(struct brw_codegen *p); -brw_inst *brw_CONT(struct brw_codegen *p); -brw_inst *brw_HALT(struct brw_codegen *p); +brw_eu_inst *brw_BREAK(struct brw_codegen *p); +brw_eu_inst *brw_CONT(struct brw_codegen *p); +brw_eu_inst *brw_HALT(struct brw_codegen *p); /* Forward jumps: */ -brw_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index, +brw_eu_inst *brw_JMPI(struct brw_codegen *p, struct brw_reg index, unsigned predicate_control); void brw_NOP(struct brw_codegen *p); @@ -1513,7 +1513,7 @@ void brw_CMPN(struct brw_codegen *p, struct brw_reg src0, struct brw_reg src1); -brw_inst *brw_DPAS(struct brw_codegen *p, enum gfx12_systolic_depth sdepth, +brw_eu_inst *brw_DPAS(struct brw_codegen *p, enum gfx12_systolic_depth sdepth, unsigned rcount, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2); @@ -1539,7 +1539,7 @@ brw_float_controls_mode(struct brw_codegen *p, void brw_update_reloc_imm(const struct brw_isa_info *isa, - brw_inst *inst, + brw_eu_inst *inst, uint32_t value); void @@ -1550,15 +1550,15 @@ brw_MOV_reloc_imm(struct brw_codegen *p, unsigned brw_num_sources_from_inst(const struct brw_isa_info *isa, - const brw_inst *inst); + const brw_eu_inst *inst); -void brw_set_src1(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg); +void brw_set_src1(struct brw_codegen *p, brw_eu_inst *insn, struct brw_reg reg); -void brw_set_desc_ex(struct brw_codegen *p, brw_inst *insn, +void brw_set_desc_ex(struct brw_codegen *p, brw_eu_inst *insn, unsigned desc, unsigned ex_desc); static inline void -brw_set_desc(struct brw_codegen *p, brw_inst *insn, unsigned desc) +brw_set_desc(struct brw_codegen *p, brw_eu_inst *insn, unsigned desc) { brw_set_desc_ex(p, insn, desc, 0); } @@ -1572,16 +1572,16 @@ enum brw_conditional_mod brw_swap_cmod(enum brw_conditional_mod cmod); void brw_compact_instructions(struct brw_codegen *p, int start_offset, struct disasm_info *disasm); void brw_uncompact_instruction(const struct brw_isa_info *isa, - brw_inst *dst, brw_compact_inst *src); + brw_eu_inst *dst, brw_compact_inst *src); bool brw_try_compact_instruction(const struct brw_isa_info *isa, - brw_compact_inst *dst, const brw_inst *src); + brw_compact_inst *dst, const brw_eu_inst *src); void brw_debug_compact_uncompact(const struct brw_isa_info *isa, - brw_inst *orig, brw_inst *uncompacted); + brw_eu_inst *orig, brw_eu_inst *uncompacted); /* brw_eu_validate.c */ bool brw_validate_instruction(const struct brw_isa_info *isa, - const brw_inst *inst, int offset, + const brw_eu_inst *inst, int offset, unsigned inst_size, struct disasm_info *disasm); bool brw_validate_instructions(const struct brw_isa_info *isa, @@ -1591,7 +1591,7 @@ bool brw_validate_instructions(const struct brw_isa_info *isa, static inline int next_offset(const struct intel_device_info *devinfo, void *store, int offset) { - brw_inst *insn = (brw_inst *)((char *)store + offset); + brw_eu_inst *insn = (brw_eu_inst *)((char *)store + offset); if (brw_inst_cmpt_control(devinfo, insn)) return offset + 8; diff --git a/src/intel/compiler/brw_eu_compact.c b/src/intel/compiler/brw_eu_compact.c index 17175d752b1..5e73a80e9c9 100644 --- a/src/intel/compiler/brw_eu_compact.c +++ b/src/intel/compiler/brw_eu_compact.c @@ -926,7 +926,7 @@ static void compaction_state_init(struct compaction_state *c, static bool set_control_index(const struct compaction_state *c, - brw_compact_inst *dst, const brw_inst *src) + brw_compact_inst *dst, const brw_eu_inst *src) { const struct intel_device_info *devinfo = c->isa->devinfo; uint32_t uncompacted; /* 19b/IVB+; 21b/TGL+ */ @@ -972,7 +972,7 @@ set_control_index(const struct compaction_state *c, static bool set_datatype_index(const struct compaction_state *c, brw_compact_inst *dst, - const brw_inst *src, bool is_immediate) + const brw_eu_inst *src, bool is_immediate) { const struct intel_device_info *devinfo = c->isa->devinfo; uint32_t uncompacted; /* 18b/G45+; 21b/BDW+; 20b/TGL+ */ @@ -1012,7 +1012,7 @@ set_datatype_index(const struct compaction_state *c, brw_compact_inst *dst, static bool set_subreg_index(const struct compaction_state *c, brw_compact_inst *dst, - const brw_inst *src, bool is_immediate) + const brw_eu_inst *src, bool is_immediate) { const struct intel_device_info *devinfo = c->isa->devinfo; const unsigned table_len = devinfo->ver >= 20 ? @@ -1050,7 +1050,7 @@ set_subreg_index(const struct compaction_state *c, brw_compact_inst *dst, static bool set_src0_index(const struct compaction_state *c, brw_compact_inst *dst, - const brw_inst *src) + const brw_eu_inst *src) { const struct intel_device_info *devinfo = c->isa->devinfo; uint16_t uncompacted; /* 12b/G45+; 11b/Xe2+ */ @@ -1083,7 +1083,7 @@ set_src0_index(const struct compaction_state *c, brw_compact_inst *dst, static bool set_src1_index(const struct compaction_state *c, brw_compact_inst *dst, - const brw_inst *src, bool is_immediate, unsigned imm) + const brw_eu_inst *src, bool is_immediate, unsigned imm) { const struct intel_device_info *devinfo = c->isa->devinfo; if (is_immediate) { @@ -1132,7 +1132,7 @@ set_src1_index(const struct compaction_state *c, brw_compact_inst *dst, static bool set_3src_control_index(const struct intel_device_info *devinfo, - brw_compact_inst *dst, const brw_inst *src, + brw_compact_inst *dst, const brw_eu_inst *src, bool is_dpas) { if (devinfo->ver >= 20) { @@ -1242,7 +1242,7 @@ set_3src_control_index(const struct intel_device_info *devinfo, static bool set_3src_source_index(const struct intel_device_info *devinfo, - brw_compact_inst *dst, const brw_inst *src, + brw_compact_inst *dst, const brw_eu_inst *src, bool is_dpas) { if (devinfo->ver >= 12) { @@ -1307,7 +1307,7 @@ set_3src_source_index(const struct intel_device_info *devinfo, static bool set_3src_subreg_index(const struct intel_device_info *devinfo, - brw_compact_inst *dst, const brw_inst *src) + brw_compact_inst *dst, const brw_eu_inst *src) { assert(devinfo->ver >= 12); @@ -1334,7 +1334,7 @@ set_3src_subreg_index(const struct intel_device_info *devinfo, } static bool -has_unmapped_bits(const struct brw_isa_info *isa, const brw_inst *src) +has_unmapped_bits(const struct brw_isa_info *isa, const brw_eu_inst *src) { const struct intel_device_info *devinfo = isa->devinfo; @@ -1366,7 +1366,7 @@ has_unmapped_bits(const struct brw_isa_info *isa, const brw_inst *src) static bool has_3src_unmapped_bits(const struct intel_device_info *devinfo, - const brw_inst *src, bool is_dpas) + const brw_eu_inst *src, bool is_dpas) { /* Check for three-source instruction bits that don't map to any of the * fields of the compacted instruction. All of them seem to be reserved @@ -1389,7 +1389,7 @@ has_3src_unmapped_bits(const struct intel_device_info *devinfo, static bool brw_try_compact_3src_instruction(const struct brw_isa_info *isa, - brw_compact_inst *dst, const brw_inst *src) + brw_compact_inst *dst, const brw_eu_inst *src) { const struct intel_device_info *devinfo = isa->devinfo; @@ -1568,7 +1568,7 @@ uncompact_immediate(const struct intel_device_info *devinfo, } static bool -has_immediate(const struct intel_device_info *devinfo, const brw_inst *inst, +has_immediate(const struct intel_device_info *devinfo, const brw_eu_inst *inst, enum brw_reg_type *type) { if (brw_inst_src0_reg_file(devinfo, inst) == IMM) { @@ -1586,8 +1586,8 @@ has_immediate(const struct intel_device_info *devinfo, const brw_inst *inst, * Applies some small changes to instruction types to increase chances of * compaction. */ -static brw_inst -precompact(const struct brw_isa_info *isa, brw_inst inst) +static brw_eu_inst +precompact(const struct brw_isa_info *isa, brw_eu_inst inst) { const struct intel_device_info *devinfo = isa->devinfo; @@ -1698,7 +1698,7 @@ precompact(const struct brw_isa_info *isa, brw_inst inst) */ static bool try_compact_instruction(const struct compaction_state *c, - brw_compact_inst *dst, const brw_inst *src) + brw_compact_inst *dst, const brw_eu_inst *src) { const struct intel_device_info *devinfo = c->isa->devinfo; brw_compact_inst temp; @@ -1790,7 +1790,7 @@ try_compact_instruction(const struct compaction_state *c, bool brw_try_compact_instruction(const struct brw_isa_info *isa, - brw_compact_inst *dst, const brw_inst *src) + brw_compact_inst *dst, const brw_eu_inst *src) { struct compaction_state c; compaction_state_init(&c, isa); @@ -1798,7 +1798,7 @@ brw_try_compact_instruction(const struct brw_isa_info *isa, } static void -set_uncompacted_control(const struct compaction_state *c, brw_inst *dst, +set_uncompacted_control(const struct compaction_state *c, brw_eu_inst *dst, brw_compact_inst *src) { const struct intel_device_info *devinfo = c->isa->devinfo; @@ -1836,7 +1836,7 @@ set_uncompacted_control(const struct compaction_state *c, brw_inst *dst, } static void -set_uncompacted_datatype(const struct compaction_state *c, brw_inst *dst, +set_uncompacted_datatype(const struct compaction_state *c, brw_eu_inst *dst, brw_compact_inst *src) { const struct intel_device_info *devinfo = c->isa->devinfo; @@ -1862,7 +1862,7 @@ set_uncompacted_datatype(const struct compaction_state *c, brw_inst *dst, } static void -set_uncompacted_subreg(const struct compaction_state *c, brw_inst *dst, +set_uncompacted_subreg(const struct compaction_state *c, brw_eu_inst *dst, brw_compact_inst *src) { const struct intel_device_info *devinfo = c->isa->devinfo; @@ -1886,7 +1886,7 @@ set_uncompacted_subreg(const struct compaction_state *c, brw_inst *dst, } static void -set_uncompacted_src0(const struct compaction_state *c, brw_inst *dst, +set_uncompacted_src0(const struct compaction_state *c, brw_eu_inst *dst, brw_compact_inst *src) { const struct intel_device_info *devinfo = c->isa->devinfo; @@ -1907,7 +1907,7 @@ set_uncompacted_src0(const struct compaction_state *c, brw_inst *dst, } static void -set_uncompacted_src1(const struct compaction_state *c, brw_inst *dst, +set_uncompacted_src1(const struct compaction_state *c, brw_eu_inst *dst, brw_compact_inst *src) { const struct intel_device_info *devinfo = c->isa->devinfo; @@ -1934,7 +1934,7 @@ set_uncompacted_src1(const struct compaction_state *c, brw_inst *dst, static void set_uncompacted_3src_control_index(const struct compaction_state *c, - brw_inst *dst, brw_compact_inst *src, + brw_eu_inst *dst, brw_compact_inst *src, bool is_dpas) { const struct intel_device_info *devinfo = c->isa->devinfo; @@ -2019,7 +2019,7 @@ set_uncompacted_3src_control_index(const struct compaction_state *c, static void set_uncompacted_3src_source_index(const struct intel_device_info *devinfo, - brw_inst *dst, brw_compact_inst *src, + brw_eu_inst *dst, brw_compact_inst *src, bool is_dpas) { uint32_t compacted = brw_compact_inst_3src_source_index(devinfo, src); @@ -2064,7 +2064,7 @@ set_uncompacted_3src_source_index(const struct intel_device_info *devinfo, static void set_uncompacted_3src_subreg_index(const struct intel_device_info *devinfo, - brw_inst *dst, brw_compact_inst *src) + brw_eu_inst *dst, brw_compact_inst *src) { assert(devinfo->ver >= 12); @@ -2080,7 +2080,7 @@ set_uncompacted_3src_subreg_index(const struct intel_device_info *devinfo, static void brw_uncompact_3src_instruction(const struct compaction_state *c, - brw_inst *dst, brw_compact_inst *src, bool is_dpas) + brw_eu_inst *dst, brw_compact_inst *src, bool is_dpas) { const struct intel_device_info *devinfo = c->isa->devinfo; @@ -2126,7 +2126,7 @@ brw_uncompact_3src_instruction(const struct compaction_state *c, } static void -uncompact_instruction(const struct compaction_state *c, brw_inst *dst, +uncompact_instruction(const struct compaction_state *c, brw_eu_inst *dst, brw_compact_inst *src) { const struct intel_device_info *devinfo = c->isa->devinfo; @@ -2184,7 +2184,7 @@ uncompact_instruction(const struct compaction_state *c, brw_inst *dst, void brw_uncompact_instruction(const struct brw_isa_info *isa, - brw_inst *dst, brw_compact_inst *src) + brw_eu_inst *dst, brw_compact_inst *src) { struct compaction_state c; compaction_state_init(&c, isa); @@ -2193,8 +2193,8 @@ brw_uncompact_instruction(const struct brw_isa_info *isa, void brw_debug_compact_uncompact(const struct brw_isa_info *isa, - brw_inst *orig, - brw_inst *uncompacted) + brw_eu_inst *orig, + brw_eu_inst *uncompacted) { fprintf(stderr, "Instruction compact/uncompact changed (gen%d):\n", isa->devinfo->ver); @@ -2229,7 +2229,7 @@ compacted_between(int old_ip, int old_target_ip, int *compacted_counts) } static void -update_uip_jip(const struct brw_isa_info *isa, brw_inst *insn, +update_uip_jip(const struct brw_isa_info *isa, brw_eu_inst *insn, int this_old_ip, int *compacted_counts) { const struct intel_device_info *devinfo = isa->devinfo; @@ -2341,7 +2341,7 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, * that preceded it. */ unsigned num_compacted_counts = - (p->next_insn_offset - start_offset) / sizeof(brw_inst); + (p->next_insn_offset - start_offset) / sizeof(brw_eu_inst); int *compacted_counts = calloc(1, sizeof(*compacted_counts) * num_compacted_counts); @@ -2358,15 +2358,15 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, int offset = 0; int compacted_count = 0; for (int src_offset = 0; src_offset < p->next_insn_offset - start_offset; - src_offset += sizeof(brw_inst)) { - brw_inst *src = store + src_offset; + src_offset += sizeof(brw_eu_inst)) { + brw_eu_inst *src = store + src_offset; void *dst = store + offset; - old_ip[offset / sizeof(brw_compact_inst)] = src_offset / sizeof(brw_inst); - compacted_counts[src_offset / sizeof(brw_inst)] = compacted_count; + old_ip[offset / sizeof(brw_compact_inst)] = src_offset / sizeof(brw_eu_inst); + compacted_counts[src_offset / sizeof(brw_eu_inst)] = compacted_count; - brw_inst inst = precompact(p->isa, *src); - brw_inst saved = inst; + brw_eu_inst inst = precompact(p->isa, *src); + brw_eu_inst saved = inst; if (try_compact_instruction(&c, dst, &inst)) { compacted_count++; @@ -2374,7 +2374,7 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, if (INTEL_DEBUG(DEBUG_VS | DEBUG_GS | DEBUG_TCS | DEBUG_TASK | DEBUG_WM | DEBUG_CS | DEBUG_TES | DEBUG_MESH | DEBUG_RT)) { - brw_inst uncompacted; + brw_eu_inst uncompacted; uncompact_instruction(&c, &uncompacted, dst); if (memcmp(&saved, &uncompacted, sizeof(uncompacted))) { brw_debug_compact_uncompact(p->isa, &saved, &uncompacted); @@ -2387,9 +2387,9 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, * place. */ if (offset != src_offset) { - memmove(dst, src, sizeof(brw_inst)); + memmove(dst, src, sizeof(brw_eu_inst)); } - offset += sizeof(brw_inst); + offset += sizeof(brw_eu_inst); } } @@ -2397,13 +2397,13 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, * simplifies the linked list walk at the end of the function. */ old_ip[offset / sizeof(brw_compact_inst)] = - (p->next_insn_offset - start_offset) / sizeof(brw_inst); + (p->next_insn_offset - start_offset) / sizeof(brw_eu_inst); /* Fix up control flow offsets. */ p->next_insn_offset = start_offset + offset; for (offset = 0; offset < p->next_insn_offset - start_offset; offset = next_offset(devinfo, store, offset)) { - brw_inst *insn = store + offset; + brw_eu_inst *insn = store + offset; int this_old_ip = old_ip[offset / sizeof(brw_compact_inst)]; int this_compacted_count = compacted_counts[this_old_ip]; @@ -2419,7 +2419,7 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, case BRW_OPCODE_ENDIF: case BRW_OPCODE_WHILE: if (brw_inst_cmpt_control(devinfo, insn)) { - brw_inst uncompacted; + brw_eu_inst uncompacted; uncompact_instruction(&c, &uncompacted, (brw_compact_inst *)insn); @@ -2474,7 +2474,7 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, brw_compact_inst_set_cmpt_control(devinfo, align, true); p->next_insn_offset += sizeof(brw_compact_inst); } - p->nr_insn = p->next_insn_offset / sizeof(brw_inst); + p->nr_insn = p->next_insn_offset / sizeof(brw_eu_inst); for (int i = 0; i < p->num_relocs; i++) { if (p->relocs[i].offset < (uint32_t)start_offset) @@ -2491,9 +2491,9 @@ brw_compact_instructions(struct brw_codegen *p, int start_offset, foreach_list_typed(struct inst_group, group, link, &disasm->group_list) { while (start_offset + old_ip[offset / sizeof(brw_compact_inst)] * - sizeof(brw_inst) != group->offset) { + sizeof(brw_eu_inst) != group->offset) { assert(start_offset + old_ip[offset / sizeof(brw_compact_inst)] * - sizeof(brw_inst) < group->offset); + sizeof(brw_eu_inst) < group->offset); offset = next_offset(devinfo, store, offset); } diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c index 0b37a37b631..8af2be86345 100644 --- a/src/intel/compiler/brw_eu_emit.c +++ b/src/intel/compiler/brw_eu_emit.c @@ -36,7 +36,7 @@ #include "util/ralloc.h" void -brw_set_dest(struct brw_codegen *p, brw_inst *inst, struct brw_reg dest) +brw_set_dest(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg dest) { const struct intel_device_info *devinfo = p->devinfo; @@ -128,7 +128,7 @@ brw_set_dest(struct brw_codegen *p, brw_inst *inst, struct brw_reg dest) } void -brw_set_src0(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg) +brw_set_src0(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg) { const struct intel_device_info *devinfo = p->devinfo; @@ -253,7 +253,7 @@ brw_set_src0(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg) void -brw_set_src1(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg) +brw_set_src1(struct brw_codegen *p, brw_eu_inst *inst, struct brw_reg reg) { const struct intel_device_info *devinfo = p->devinfo; @@ -349,7 +349,7 @@ brw_set_src1(struct brw_codegen *p, brw_inst *inst, struct brw_reg reg) * message instruction. */ void -brw_set_desc_ex(struct brw_codegen *p, brw_inst *inst, +brw_set_desc_ex(struct brw_codegen *p, brw_eu_inst *inst, unsigned desc, unsigned ex_desc) { const struct intel_device_info *devinfo = p->devinfo; @@ -365,7 +365,7 @@ brw_set_desc_ex(struct brw_codegen *p, brw_inst *inst, static void brw_inst_set_state(const struct brw_isa_info *isa, - brw_inst *insn, + brw_eu_inst *insn, const struct brw_insn_state *state) { const struct intel_device_info *devinfo = isa->devinfo; @@ -393,18 +393,18 @@ brw_inst_set_state(const struct brw_isa_info *isa, brw_inst_set_acc_wr_control(devinfo, insn, state->acc_wr_control); } -static brw_inst * +static brw_eu_inst * brw_append_insns(struct brw_codegen *p, unsigned nr_insn, unsigned alignment) { - assert(util_is_power_of_two_or_zero(sizeof(brw_inst))); + assert(util_is_power_of_two_or_zero(sizeof(brw_eu_inst))); assert(util_is_power_of_two_or_zero(alignment)); - const unsigned align_insn = MAX2(alignment / sizeof(brw_inst), 1); + const unsigned align_insn = MAX2(alignment / sizeof(brw_eu_inst), 1); const unsigned start_insn = ALIGN(p->nr_insn, align_insn); const unsigned new_nr_insn = start_insn + nr_insn; if (p->store_size < new_nr_insn) { - p->store_size = util_next_power_of_two(new_nr_insn * sizeof(brw_inst)); - p->store = reralloc(p->mem_ctx, p->store, brw_inst, p->store_size); + p->store_size = util_next_power_of_two(new_nr_insn * sizeof(brw_eu_inst)); + p->store = reralloc(p->mem_ctx, p->store, brw_eu_inst, p->store_size); } /* Memset any padding due to alignment to 0. We don't want to be hashing @@ -412,12 +412,12 @@ brw_append_insns(struct brw_codegen *p, unsigned nr_insn, unsigned alignment) */ if (p->nr_insn < start_insn) { memset(&p->store[p->nr_insn], 0, - (start_insn - p->nr_insn) * sizeof(brw_inst)); + (start_insn - p->nr_insn) * sizeof(brw_eu_inst)); } - assert(p->next_insn_offset == p->nr_insn * sizeof(brw_inst)); + assert(p->next_insn_offset == p->nr_insn * sizeof(brw_eu_inst)); p->nr_insn = new_nr_insn; - p->next_insn_offset = new_nr_insn * sizeof(brw_inst); + p->next_insn_offset = new_nr_insn * sizeof(brw_eu_inst); return &p->store[start_insn]; } @@ -432,22 +432,22 @@ int brw_append_data(struct brw_codegen *p, void *data, unsigned size, unsigned alignment) { - unsigned nr_insn = DIV_ROUND_UP(size, sizeof(brw_inst)); + unsigned nr_insn = DIV_ROUND_UP(size, sizeof(brw_eu_inst)); void *dst = brw_append_insns(p, nr_insn, alignment); memcpy(dst, data, size); /* If it's not a whole number of instructions, memset the end */ - if (size < nr_insn * sizeof(brw_inst)) - memset(dst + size, 0, nr_insn * sizeof(brw_inst) - size); + if (size < nr_insn * sizeof(brw_eu_inst)) + memset(dst + size, 0, nr_insn * sizeof(brw_eu_inst) - size); return dst - (void *)p->store; } #define next_insn brw_next_insn -brw_inst * +brw_eu_inst * brw_next_insn(struct brw_codegen *p, unsigned opcode) { - brw_inst *insn = brw_append_insns(p, 1, sizeof(brw_inst)); + brw_eu_inst *insn = brw_append_insns(p, 1, sizeof(brw_eu_inst)); memset(insn, 0, sizeof(*insn)); brw_inst_set_opcode(p->isa, insn, opcode); @@ -477,17 +477,17 @@ brw_add_reloc(struct brw_codegen *p, uint32_t id, }; } -static brw_inst * +static brw_eu_inst * brw_alu1(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, struct brw_reg src) { - brw_inst *insn = next_insn(p, opcode); + brw_eu_inst *insn = next_insn(p, opcode); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src); return insn; } -static brw_inst * +static brw_eu_inst * brw_alu2(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { @@ -497,7 +497,7 @@ brw_alu2(struct brw_codegen *p, unsigned opcode, assert(src1.file != IMM || brw_type_size_bytes(src1.type) <= 4); - brw_inst *insn = next_insn(p, opcode); + brw_eu_inst *insn = next_insn(p, opcode); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, src1); @@ -545,12 +545,12 @@ to_3src_align1_hstride(enum brw_horizontal_stride hstride) } } -static brw_inst * +static brw_eu_inst * brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *inst = next_insn(p, opcode); + brw_eu_inst *inst = next_insn(p, opcode); assert(dest.nr < XE2_MAX_GRF); @@ -740,13 +740,13 @@ brw_alu3(struct brw_codegen *p, unsigned opcode, struct brw_reg dest, return inst; } -static brw_inst * +static brw_eu_inst * brw_dpas_three_src(struct brw_codegen *p, enum opcode opcode, enum gfx12_systolic_depth sdepth, unsigned rcount, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *inst = next_insn(p, opcode); + brw_eu_inst *inst = next_insn(p, opcode); assert(dest.file == FIXED_GRF); brw_inst_set_dpas_3src_dst_reg_file(devinfo, inst, @@ -799,7 +799,7 @@ brw_dpas_three_src(struct brw_codegen *p, enum opcode opcode, * Convenience routines. */ #define ALU1(OP) \ -brw_inst *brw_##OP(struct brw_codegen *p, \ +brw_eu_inst *brw_##OP(struct brw_codegen *p, \ struct brw_reg dest, \ struct brw_reg src0) \ { \ @@ -807,7 +807,7 @@ brw_inst *brw_##OP(struct brw_codegen *p, \ } #define ALU2(OP) \ -brw_inst *brw_##OP(struct brw_codegen *p, \ +brw_eu_inst *brw_##OP(struct brw_codegen *p, \ struct brw_reg dest, \ struct brw_reg src0, \ struct brw_reg src1) \ @@ -816,7 +816,7 @@ brw_inst *brw_##OP(struct brw_codegen *p, \ } #define ALU3(OP) \ -brw_inst *brw_##OP(struct brw_codegen *p, \ +brw_eu_inst *brw_##OP(struct brw_codegen *p, \ struct brw_reg dest, \ struct brw_reg src0, \ struct brw_reg src1, \ @@ -834,7 +834,7 @@ brw_inst *brw_##OP(struct brw_codegen *p, \ } #define ALU3F(OP) \ -brw_inst *brw_##OP(struct brw_codegen *p, \ +brw_eu_inst *brw_##OP(struct brw_codegen *p, \ struct brw_reg dest, \ struct brw_reg src0, \ struct brw_reg src1, \ @@ -901,7 +901,7 @@ ALU2(SUBB) ALU3(ADD3) ALU1(MOV) -brw_inst * +brw_eu_inst * brw_ADD(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { @@ -923,7 +923,7 @@ brw_ADD(struct brw_codegen *p, struct brw_reg dest, return brw_alu2(p, BRW_OPCODE_ADD, dest, src0, src1); } -brw_inst * +brw_eu_inst * brw_AVG(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { @@ -944,7 +944,7 @@ brw_AVG(struct brw_codegen *p, struct brw_reg dest, return brw_alu2(p, BRW_OPCODE_AVG, dest, src0, src1); } -brw_inst * +brw_eu_inst * brw_MUL(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { @@ -978,7 +978,7 @@ brw_MUL(struct brw_codegen *p, struct brw_reg dest, return brw_alu2(p, BRW_OPCODE_MUL, dest, src0, src1); } -brw_inst * +brw_eu_inst * brw_LINE(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { @@ -988,7 +988,7 @@ brw_LINE(struct brw_codegen *p, struct brw_reg dest, return brw_alu2(p, BRW_OPCODE_LINE, dest, src0, src1); } -brw_inst * +brw_eu_inst * brw_PLN(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { @@ -1001,7 +1001,7 @@ brw_PLN(struct brw_codegen *p, struct brw_reg dest, return brw_alu2(p, BRW_OPCODE_PLN, dest, src0, src1); } -brw_inst * +brw_eu_inst * brw_DPAS(struct brw_codegen *p, enum gfx12_systolic_depth sdepth, unsigned rcount, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1, struct brw_reg src2) @@ -1012,14 +1012,14 @@ brw_DPAS(struct brw_codegen *p, enum gfx12_systolic_depth sdepth, void brw_NOP(struct brw_codegen *p) { - brw_inst *insn = next_insn(p, BRW_OPCODE_NOP); + brw_eu_inst *insn = next_insn(p, BRW_OPCODE_NOP); memset(insn, 0, sizeof(*insn)); brw_inst_set_opcode(p->isa, insn, BRW_OPCODE_NOP); } void brw_SYNC(struct brw_codegen *p, enum tgl_sync_function func) { - brw_inst *insn = next_insn(p, BRW_OPCODE_SYNC); + brw_eu_inst *insn = next_insn(p, BRW_OPCODE_SYNC); brw_inst_set_cond_modifier(p->devinfo, insn, func); } @@ -1027,13 +1027,13 @@ void brw_SYNC(struct brw_codegen *p, enum tgl_sync_function func) * Comparisons, if/else/endif */ -brw_inst * +brw_eu_inst * brw_JMPI(struct brw_codegen *p, struct brw_reg index, unsigned predicate_control) { const struct intel_device_info *devinfo = p->devinfo; struct brw_reg ip = brw_ip_reg(); - brw_inst *inst = brw_alu2(p, BRW_OPCODE_JMPI, ip, ip, index); + brw_eu_inst *inst = brw_alu2(p, BRW_OPCODE_JMPI, ip, ip, index); brw_inst_set_exec_size(devinfo, inst, BRW_EXECUTE_1); brw_inst_set_qtr_control(devinfo, inst, BRW_COMPRESSION_NONE); @@ -1044,7 +1044,7 @@ brw_JMPI(struct brw_codegen *p, struct brw_reg index, } static void -push_if_stack(struct brw_codegen *p, brw_inst *inst) +push_if_stack(struct brw_codegen *p, brw_eu_inst *inst) { p->if_stack[p->if_stack_depth] = inst - p->store; @@ -1056,7 +1056,7 @@ push_if_stack(struct brw_codegen *p, brw_inst *inst) } } -static brw_inst * +static brw_eu_inst * pop_if_stack(struct brw_codegen *p) { p->if_stack_depth--; @@ -1064,7 +1064,7 @@ pop_if_stack(struct brw_codegen *p) } static void -push_loop_stack(struct brw_codegen *p, brw_inst *inst) +push_loop_stack(struct brw_codegen *p, brw_eu_inst *inst) { if (p->loop_stack_array_size <= (p->loop_stack_depth + 1)) { p->loop_stack_array_size *= 2; @@ -1076,7 +1076,7 @@ push_loop_stack(struct brw_codegen *p, brw_inst *inst) p->loop_stack_depth++; } -static brw_inst * +static brw_eu_inst * get_inner_do_insn(struct brw_codegen *p) { return &p->store[p->loop_stack[p->loop_stack_depth - 1]]; @@ -1095,11 +1095,11 @@ get_inner_do_insn(struct brw_codegen *p) * When the matching 'endif' instruction is reached, the flags are * popped off. If the stack is now empty, normal execution resumes. */ -brw_inst * +brw_eu_inst * brw_IF(struct brw_codegen *p, unsigned execute_size) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *insn; + brw_eu_inst *insn; insn = next_insn(p, BRW_OPCODE_IF); @@ -1125,7 +1125,7 @@ brw_IF(struct brw_codegen *p, unsigned execute_size) */ static void patch_IF_ELSE(struct brw_codegen *p, - brw_inst *if_inst, brw_inst *else_inst, brw_inst *endif_inst) + brw_eu_inst *if_inst, brw_eu_inst *else_inst, brw_eu_inst *endif_inst) { const struct intel_device_info *devinfo = p->devinfo; @@ -1179,7 +1179,7 @@ void brw_ELSE(struct brw_codegen *p) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *insn; + brw_eu_inst *insn; insn = next_insn(p, BRW_OPCODE_ELSE); @@ -1199,10 +1199,10 @@ void brw_ENDIF(struct brw_codegen *p) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *insn = NULL; - brw_inst *else_inst = NULL; - brw_inst *if_inst = NULL; - brw_inst *tmp; + brw_eu_inst *insn = NULL; + brw_eu_inst *else_inst = NULL; + brw_eu_inst *if_inst = NULL; + brw_eu_inst *tmp; assert(p->if_stack_depth > 0); @@ -1244,11 +1244,11 @@ brw_ENDIF(struct brw_codegen *p) patch_IF_ELSE(p, if_inst, else_inst, insn); } -brw_inst * +brw_eu_inst * brw_BREAK(struct brw_codegen *p) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *insn; + brw_eu_inst *insn; insn = next_insn(p, BRW_OPCODE_BREAK); brw_set_dest(p, insn, retype(brw_null_reg(), BRW_TYPE_D)); @@ -1259,11 +1259,11 @@ brw_BREAK(struct brw_codegen *p) return insn; } -brw_inst * +brw_eu_inst * brw_CONT(struct brw_codegen *p) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *insn; + brw_eu_inst *insn; insn = next_insn(p, BRW_OPCODE_CONTINUE); brw_set_dest(p, insn, brw_ip_reg()); @@ -1274,11 +1274,11 @@ brw_CONT(struct brw_codegen *p) return insn; } -brw_inst * +brw_eu_inst * brw_HALT(struct brw_codegen *p) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *insn; + brw_eu_inst *insn; insn = next_insn(p, BRW_OPCODE_HALT); brw_set_dest(p, insn, retype(brw_null_reg(), BRW_TYPE_D)); @@ -1303,18 +1303,18 @@ brw_HALT(struct brw_codegen *p) * For gfx6, there's no more mask stack, so no need for DO. WHILE * just points back to the first instruction of the loop. */ -brw_inst * +brw_eu_inst * brw_DO(struct brw_codegen *p, unsigned execute_size) { push_loop_stack(p, &p->store[p->nr_insn]); return &p->store[p->nr_insn]; } -brw_inst * +brw_eu_inst * brw_WHILE(struct brw_codegen *p) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *insn, *do_insn; + brw_eu_inst *insn, *do_insn; unsigned br = brw_jump_scale(devinfo); insn = next_insn(p, BRW_OPCODE_WHILE); @@ -1341,7 +1341,7 @@ void brw_CMP(struct brw_codegen *p, struct brw_reg src1) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *insn = next_insn(p, BRW_OPCODE_CMP); + brw_eu_inst *insn = next_insn(p, BRW_OPCODE_CMP); brw_inst_set_cond_modifier(devinfo, insn, conditional); brw_set_dest(p, insn, dest); @@ -1356,7 +1356,7 @@ void brw_CMPN(struct brw_codegen *p, struct brw_reg src1) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *insn = next_insn(p, BRW_OPCODE_CMPN); + brw_eu_inst *insn = next_insn(p, BRW_OPCODE_CMPN); brw_inst_set_cond_modifier(devinfo, insn, conditional); brw_set_dest(p, insn, dest); @@ -1375,7 +1375,7 @@ void gfx6_math(struct brw_codegen *p, struct brw_reg src1) { const struct intel_device_info *devinfo = p->devinfo; - brw_inst *insn = next_insn(p, BRW_OPCODE_MATH); + brw_eu_inst *insn = next_insn(p, BRW_OPCODE_MATH); assert(dest.file == FIXED_GRF); @@ -1439,7 +1439,7 @@ brw_send_indirect_message(struct brw_codegen *p, bool eot) { const struct intel_device_info *devinfo = p->devinfo; - struct brw_inst *send; + struct brw_eu_inst *send; dst = retype(dst, BRW_TYPE_UW); @@ -1499,7 +1499,7 @@ brw_send_indirect_split_message(struct brw_codegen *p, bool eot) { const struct intel_device_info *devinfo = p->devinfo; - struct brw_inst *send; + struct brw_eu_inst *send; dst = retype(dst, BRW_TYPE_UW); @@ -1651,7 +1651,7 @@ brw_send_indirect_split_message(struct brw_codegen *p, static bool while_jumps_before_offset(const struct intel_device_info *devinfo, - brw_inst *insn, int while_offset, int start_offset) + brw_eu_inst *insn, int while_offset, int start_offset) { int scale = 16 / brw_jump_scale(devinfo); int jip = brw_inst_jip(devinfo, insn); @@ -1672,7 +1672,7 @@ brw_find_next_block_end(struct brw_codegen *p, int start_offset) for (offset = next_offset(devinfo, store, start_offset); offset < p->next_insn_offset; offset = next_offset(devinfo, store, offset)) { - brw_inst *insn = store + offset; + brw_eu_inst *insn = store + offset; switch (brw_inst_opcode(p->isa, insn)) { case BRW_OPCODE_IF: @@ -1720,7 +1720,7 @@ brw_find_loop_end(struct brw_codegen *p, int start_offset) for (offset = next_offset(devinfo, store, start_offset); offset < p->next_insn_offset; offset = next_offset(devinfo, store, offset)) { - brw_inst *insn = store + offset; + brw_eu_inst *insn = store + offset; if (brw_inst_opcode(p->isa, insn) == BRW_OPCODE_WHILE) { if (while_jumps_before_offset(devinfo, insn, offset, start_offset)) @@ -1744,7 +1744,7 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset) void *store = p->store; for (offset = start_offset; offset < p->next_insn_offset; offset += 16) { - brw_inst *insn = store + offset; + brw_eu_inst *insn = store + offset; assert(brw_inst_cmpt_control(devinfo, insn) == 0); switch (brw_inst_opcode(p->isa, insn)) { @@ -1809,7 +1809,7 @@ brw_set_uip_jip(struct brw_codegen *p, int start_offset) static void brw_set_memory_fence_message(struct brw_codegen *p, - struct brw_inst *insn, + struct brw_eu_inst *insn, enum brw_message_target sfid, bool commit_enable, unsigned bti) @@ -1841,7 +1841,7 @@ brw_set_memory_fence_message(struct brw_codegen *p, static void gfx12_set_memory_fence_message(struct brw_codegen *p, - struct brw_inst *insn, + struct brw_eu_inst *insn, enum brw_message_target sfid, uint32_t desc) { @@ -1908,7 +1908,7 @@ brw_memory_fence(struct brw_codegen *p, /* Set dst as destination for dependency tracking, the MEMORY_FENCE * message doesn't write anything back. */ - struct brw_inst *insn = next_insn(p, send_op); + struct brw_eu_inst *insn = next_insn(p, send_op); brw_inst_set_mask_control(devinfo, insn, BRW_MASK_DISABLE); brw_inst_set_exec_size(devinfo, insn, BRW_EXECUTE_1); brw_set_dest(p, insn, dst); @@ -2055,7 +2055,7 @@ void brw_barrier(struct brw_codegen *p, struct brw_reg src) { const struct intel_device_info *devinfo = p->devinfo; - struct brw_inst *inst; + struct brw_eu_inst *inst; brw_push_insn_state(p); brw_set_default_access_mode(p, BRW_ALIGN_1); @@ -2082,7 +2082,7 @@ void brw_WAIT(struct brw_codegen *p) { const struct intel_device_info *devinfo = p->devinfo; - struct brw_inst *insn; + struct brw_eu_inst *insn; struct brw_reg src = brw_notification_reg(); @@ -2112,14 +2112,14 @@ brw_float_controls_mode(struct brw_codegen *p, */ brw_set_default_swsb(p, tgl_swsb_regdist(1)); - brw_inst *inst = brw_AND(p, brw_cr0_reg(0), brw_cr0_reg(0), + brw_eu_inst *inst = brw_AND(p, brw_cr0_reg(0), brw_cr0_reg(0), brw_imm_ud(~mask)); brw_inst_set_exec_size(p->devinfo, inst, BRW_EXECUTE_1); if (p->devinfo->ver < 12) brw_inst_set_thread_control(p->devinfo, inst, BRW_THREAD_SWITCH); if (mode) { - brw_inst *inst_or = brw_OR(p, brw_cr0_reg(0), brw_cr0_reg(0), + brw_eu_inst *inst_or = brw_OR(p, brw_cr0_reg(0), brw_cr0_reg(0), brw_imm_ud(mode)); brw_inst_set_exec_size(p->devinfo, inst_or, BRW_EXECUTE_1); if (p->devinfo->ver < 12) @@ -2132,7 +2132,7 @@ brw_float_controls_mode(struct brw_codegen *p, void brw_update_reloc_imm(const struct brw_isa_info *isa, - brw_inst *inst, + brw_eu_inst *inst, uint32_t value) { const struct intel_device_info *devinfo = isa->devinfo; diff --git a/src/intel/compiler/brw_eu_inst.h b/src/intel/compiler/brw_eu_inst.h index 1bb89590405..6a932e4a28e 100644 --- a/src/intel/compiler/brw_eu_inst.h +++ b/src/intel/compiler/brw_eu_inst.h @@ -42,21 +42,21 @@ extern "C" { #endif -/* brw_context.h has a forward declaration of brw_inst, so name the struct. */ -typedef struct brw_inst { +/* brw_context.h has a forward declaration of brw_eu_inst, so name the struct. */ +typedef struct brw_eu_inst { uint64_t data[2]; -} brw_inst; +} brw_eu_inst; -static inline uint64_t brw_inst_bits(const brw_inst *inst, +static inline uint64_t brw_inst_bits(const brw_eu_inst *inst, unsigned high, unsigned low); -static inline void brw_inst_set_bits(brw_inst *inst, +static inline void brw_inst_set_bits(brw_eu_inst *inst, unsigned high, unsigned low, uint64_t value); #define FC(name, hi9, lo9, hi12, lo12, assertions) \ static inline void \ brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_inst *inst, uint64_t v) \ + brw_eu_inst *inst, uint64_t v) \ { \ assert(assertions); \ if (devinfo->ver >= 12) \ @@ -66,7 +66,7 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \ } \ static inline uint64_t \ brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ assert(assertions); \ if (devinfo->ver >= 12) \ @@ -86,7 +86,7 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ #define F20(name, hi9, lo9, hi12, lo12, hi20, lo20) \ static inline void \ brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_inst *inst, uint64_t v) \ + brw_eu_inst *inst, uint64_t v) \ { \ if (devinfo->ver >= 20) \ brw_inst_set_bits(inst, hi20, lo20, v); \ @@ -97,7 +97,7 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ } \ static inline uint64_t \ brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ if (devinfo->ver >= 20) \ return brw_inst_bits(inst, hi20, lo20); \ @@ -110,7 +110,7 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ #define FV20(name, hi9, lo9, hi12, lo12, hi20, lo20) \ static inline void \ brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_inst *inst, uint64_t v) \ + brw_eu_inst *inst, uint64_t v) \ { \ if (devinfo->ver >= 20) \ brw_inst_set_bits(inst, hi20, lo20, v & 0x7); \ @@ -121,7 +121,7 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ } \ static inline uint64_t \ brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ if (devinfo->ver >= 20) \ return brw_inst_bits(inst, hi20, lo20) == 0x7 ? 0xF : \ @@ -135,7 +135,7 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ #define FD20(name, hi9, lo9, hi12, lo12, hi20, lo20, zero20) \ static inline void \ brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_inst *inst, uint64_t v) \ + brw_eu_inst *inst, uint64_t v) \ { \ if (devinfo->ver >= 20) { \ brw_inst_set_bits(inst, hi20, lo20, v >> 1); \ @@ -150,7 +150,7 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ } \ static inline uint64_t \ brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ if (devinfo->ver >= 20) \ return (brw_inst_bits(inst, hi20, lo20) << 1) | \ @@ -168,7 +168,7 @@ brw_inst_##name(const struct intel_device_info *devinfo, \ #define FFDC(name, hi9, lo9, hi12ex, lo12ex, hi12, lo12, assertions) \ static inline void \ brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_inst *inst, uint64_t value) \ + brw_eu_inst *inst, uint64_t value) \ { \ assert(assertions); \ if (devinfo->ver >= 12) { \ @@ -181,7 +181,8 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \ } \ } \ static inline uint64_t \ -brw_inst_##name(const struct intel_device_info *devinfo, const brw_inst *inst)\ +brw_inst_##name(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ assert(assertions); \ if (devinfo->ver >= 12) { \ @@ -237,7 +238,7 @@ hw_reg_file_to_brw_reg_file(uint64_t v) #define FFC(name, hi9, lo9, hi12, lo12, assertions, ...) \ static inline void \ brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_inst *inst, enum brw_reg_file file) \ + brw_eu_inst *inst, enum brw_reg_file file) \ { \ assert(assertions); \ const struct { \ @@ -264,7 +265,8 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \ } \ } \ static inline uint64_t \ -brw_inst_##name(const struct intel_device_info *devinfo, const brw_inst *inst)\ +brw_inst_##name(const struct intel_device_info *devinfo, \ + const brw_eu_inst *inst) \ { \ assert(assertions); \ const struct { \ @@ -297,7 +299,7 @@ brw_inst_##name(const struct intel_device_info *devinfo, const brw_inst *inst)\ #define FK(name, hi9, lo9, const12) \ static inline void \ brw_inst_set_##name(const struct intel_device_info *devinfo, \ - brw_inst *inst, uint64_t v) \ + brw_eu_inst *inst, uint64_t v) \ { \ if (devinfo->ver >= 12) \ assert(v == (const12)); \ @@ -306,7 +308,7 @@ brw_inst_set_##name(const struct intel_device_info *devinfo, \ } \ static inline uint64_t \ brw_inst_##name(const struct intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ if (devinfo->ver >= 12) \ return (const12); \ @@ -438,7 +440,7 @@ F(3src_hw_opcode, /* 9+ */ 6, 0, /* 12+ */ 6, 0) static inline void \ brw_inst_set_3src_a16_##srcN##_subreg_nr(const struct \ intel_device_info *devinfo, \ - brw_inst *inst, \ + brw_eu_inst *inst, \ unsigned value) \ { \ assert(devinfo->ver == 9); \ @@ -449,7 +451,7 @@ brw_inst_set_3src_a16_##srcN##_subreg_nr(const struct \ static inline unsigned \ brw_inst_3src_a16_##srcN##_subreg_nr(const struct \ intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ assert(devinfo->ver == 9); \ return brw_inst_bits(inst, src_base + 11, src_base + 9) << 2 | \ @@ -464,7 +466,7 @@ F_3SRC_A16_SUBREG_NR(src2, 106) #define REG_TYPE(reg) \ static inline void \ brw_inst_set_3src_a16_##reg##_type(const struct intel_device_info *devinfo, \ - brw_inst *inst, enum brw_reg_type type) \ + brw_eu_inst *inst, enum brw_reg_type type) \ { \ unsigned hw_type = brw_type_encode_for_3src(devinfo, type); \ brw_inst_set_3src_a16_##reg##_hw_type(devinfo, inst, hw_type); \ @@ -472,7 +474,7 @@ brw_inst_set_3src_a16_##reg##_type(const struct intel_device_info *devinfo, \ \ static inline enum brw_reg_type \ brw_inst_3src_a16_##reg##_type(const struct intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ unsigned hw_type = brw_inst_3src_a16_##reg##_hw_type(devinfo, inst); \ return brw_type_decode_for_3src(devinfo, hw_type, 0); \ @@ -526,7 +528,7 @@ FC(3src_a1_exec_type, /* 9+ */ 35, 35, /* 12+ */ 39, 39, devinfo->ver #define REG_TYPE(reg) \ static inline void \ brw_inst_set_3src_a1_##reg##_type(const struct intel_device_info *devinfo, \ - brw_inst *inst, enum brw_reg_type type) \ + brw_eu_inst *inst, enum brw_reg_type type) \ { \ UNUSED enum gfx10_align1_3src_exec_type exec_type = \ (enum gfx10_align1_3src_exec_type) brw_inst_3src_a1_exec_type(devinfo, \ @@ -542,7 +544,7 @@ brw_inst_set_3src_a1_##reg##_type(const struct intel_device_info *devinfo, \ \ static inline enum brw_reg_type \ brw_inst_3src_a1_##reg##_type(const struct intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ enum gfx10_align1_3src_exec_type exec_type = \ (enum gfx10_align1_3src_exec_type) brw_inst_3src_a1_exec_type(devinfo, \ @@ -563,7 +565,7 @@ REG_TYPE(src2) */ static inline uint16_t brw_inst_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, - const brw_inst *insn) + const brw_eu_inst *insn) { assert(devinfo->ver >= 10); if (devinfo->ver >= 12) @@ -574,7 +576,7 @@ brw_inst_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, static inline uint16_t brw_inst_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo, - const brw_inst *insn) + const brw_eu_inst *insn) { assert(devinfo->ver >= 10); if (devinfo->ver >= 12) @@ -585,7 +587,7 @@ brw_inst_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo, static inline void brw_inst_set_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, - brw_inst *insn, uint16_t value) + brw_eu_inst *insn, uint16_t value) { assert(devinfo->ver >= 10); if (devinfo->ver >= 12) @@ -596,7 +598,7 @@ brw_inst_set_3src_a1_src0_imm(ASSERTED const struct intel_device_info *devinfo, static inline void brw_inst_set_3src_a1_src2_imm(ASSERTED const struct intel_device_info *devinfo, - brw_inst *insn, uint16_t value) + brw_eu_inst *insn, uint16_t value) { assert(devinfo->ver >= 10); if (devinfo->ver >= 12) @@ -636,7 +638,7 @@ F(dpas_3src_dst_hw_type, /* 9+ */ -1, -1, /* 12+ */ 38, 36) #define REG_TYPE(reg) \ static inline void \ brw_inst_set_dpas_3src_##reg##_type(const struct intel_device_info *devinfo, \ - brw_inst *inst, enum brw_reg_type type) \ + brw_eu_inst *inst, enum brw_reg_type type)\ { \ UNUSED enum gfx10_align1_3src_exec_type exec_type = \ (enum gfx10_align1_3src_exec_type) brw_inst_dpas_3src_exec_type(devinfo,\ @@ -652,7 +654,7 @@ brw_inst_set_dpas_3src_##reg##_type(const struct intel_device_info *devinfo, \ \ static inline enum brw_reg_type \ brw_inst_dpas_3src_##reg##_type(const struct intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ enum gfx10_align1_3src_exec_type exec_type = \ (enum gfx10_align1_3src_exec_type) brw_inst_dpas_3src_exec_type(devinfo,\ @@ -673,7 +675,7 @@ REG_TYPE(src2) */ static inline void brw_inst_set_uip(const struct intel_device_info *devinfo, - brw_inst *inst, int32_t value) + brw_eu_inst *inst, int32_t value) { if (devinfo->ver >= 12) brw_inst_set_src1_is_imm(devinfo, inst, 1); @@ -682,14 +684,14 @@ brw_inst_set_uip(const struct intel_device_info *devinfo, } static inline int32_t -brw_inst_uip(const struct intel_device_info *devinfo, const brw_inst *inst) +brw_inst_uip(const struct intel_device_info *devinfo, const brw_eu_inst *inst) { return brw_inst_bits(inst, 95, 64); } static inline void brw_inst_set_jip(const struct intel_device_info *devinfo, - brw_inst *inst, int32_t value) + brw_eu_inst *inst, int32_t value) { if (devinfo->ver >= 12) brw_inst_set_src0_is_imm(devinfo, inst, 1); @@ -698,7 +700,7 @@ brw_inst_set_jip(const struct intel_device_info *devinfo, } static inline int32_t -brw_inst_jip(const struct intel_device_info *devinfo, const brw_inst *inst) +brw_inst_jip(const struct intel_device_info *devinfo, const brw_eu_inst *inst) { return brw_inst_bits(inst, 127, 96); } @@ -744,7 +746,7 @@ FC(send_src0_subreg_nr, /* 9+ */ -1, -1, /* 12+ */ 103, 99, devinfo->verx */ static inline void brw_inst_set_send_desc(const struct intel_device_info *devinfo, - brw_inst *inst, uint32_t value) + brw_eu_inst *inst, uint32_t value) { if (devinfo->ver >= 12) { brw_inst_set_bits(inst, 123, 122, GET_BITS(value, 31, 30)); @@ -765,7 +767,7 @@ brw_inst_set_send_desc(const struct intel_device_info *devinfo, */ static inline uint32_t brw_inst_send_desc(const struct intel_device_info *devinfo, - const brw_inst *inst) + const brw_eu_inst *inst) { if (devinfo->ver >= 12) { return (brw_inst_bits(inst, 123, 122) << 30 | @@ -789,7 +791,7 @@ brw_inst_send_desc(const struct intel_device_info *devinfo, */ static inline void brw_inst_set_send_ex_desc(const struct intel_device_info *devinfo, - brw_inst *inst, uint32_t value, bool gather) + brw_eu_inst *inst, uint32_t value, bool gather) { assert(!gather || devinfo->ver >= 30); @@ -831,7 +833,7 @@ brw_inst_set_send_ex_desc(const struct intel_device_info *devinfo, */ static inline void brw_inst_set_sends_ex_desc(const struct intel_device_info *devinfo, - brw_inst *inst, uint32_t value, bool gather) + brw_eu_inst *inst, uint32_t value, bool gather) { if (devinfo->ver >= 12) { brw_inst_set_send_ex_desc(devinfo, inst, value, gather); @@ -850,7 +852,7 @@ brw_inst_set_sends_ex_desc(const struct intel_device_info *devinfo, */ static inline uint32_t brw_inst_send_ex_desc(const struct intel_device_info *devinfo, - const brw_inst *inst, bool gather) + const brw_eu_inst *inst, bool gather) { assert(!gather || devinfo->ver >= 30); @@ -876,7 +878,7 @@ brw_inst_send_ex_desc(const struct intel_device_info *devinfo, */ static inline uint32_t brw_inst_sends_ex_desc(const struct intel_device_info *devinfo, - const brw_inst *inst, bool gather) + const brw_eu_inst *inst, bool gather) { if (devinfo->ver >= 12) { return brw_inst_send_ex_desc(devinfo, inst, gather); @@ -977,14 +979,14 @@ F(pi_message_data, /* 9+ */ MD(7), MD(0), /* 12+ */ MD12(7), MD12(0)) * @{ */ static inline int -brw_inst_imm_d(const struct intel_device_info *devinfo, const brw_inst *insn) +brw_inst_imm_d(const struct intel_device_info *devinfo, const brw_eu_inst *insn) { (void) devinfo; return brw_inst_bits(insn, 127, 96); } static inline unsigned -brw_inst_imm_ud(const struct intel_device_info *devinfo, const brw_inst *insn) +brw_inst_imm_ud(const struct intel_device_info *devinfo, const brw_eu_inst *insn) { (void) devinfo; return brw_inst_bits(insn, 127, 96); @@ -992,7 +994,7 @@ brw_inst_imm_ud(const struct intel_device_info *devinfo, const brw_inst *insn) static inline uint64_t brw_inst_imm_uq(const struct intel_device_info *devinfo, - const brw_inst *insn) + const brw_eu_inst *insn) { if (devinfo->ver >= 12) { return brw_inst_bits(insn, 95, 64) << 32 | @@ -1003,7 +1005,7 @@ brw_inst_imm_uq(const struct intel_device_info *devinfo, } static inline float -brw_inst_imm_f(const struct intel_device_info *devinfo, const brw_inst *insn) +brw_inst_imm_f(const struct intel_device_info *devinfo, const brw_eu_inst *insn) { union { float f; @@ -1015,7 +1017,7 @@ brw_inst_imm_f(const struct intel_device_info *devinfo, const brw_inst *insn) } static inline double -brw_inst_imm_df(const struct intel_device_info *devinfo, const brw_inst *insn) +brw_inst_imm_df(const struct intel_device_info *devinfo, const brw_eu_inst *insn) { union { double d; @@ -1027,7 +1029,7 @@ brw_inst_imm_df(const struct intel_device_info *devinfo, const brw_inst *insn) static inline void brw_inst_set_imm_d(const struct intel_device_info *devinfo, - brw_inst *insn, int value) + brw_eu_inst *insn, int value) { (void) devinfo; return brw_inst_set_bits(insn, 127, 96, value); @@ -1035,7 +1037,7 @@ brw_inst_set_imm_d(const struct intel_device_info *devinfo, static inline void brw_inst_set_imm_ud(const struct intel_device_info *devinfo, - brw_inst *insn, unsigned value) + brw_eu_inst *insn, unsigned value) { (void) devinfo; return brw_inst_set_bits(insn, 127, 96, value); @@ -1043,7 +1045,7 @@ brw_inst_set_imm_ud(const struct intel_device_info *devinfo, static inline void brw_inst_set_imm_f(const struct intel_device_info *devinfo, - brw_inst *insn, float value) + brw_eu_inst *insn, float value) { union { float f; @@ -1056,7 +1058,7 @@ brw_inst_set_imm_f(const struct intel_device_info *devinfo, static inline void brw_inst_set_imm_df(const struct intel_device_info *devinfo, - brw_inst *insn, double value) + brw_eu_inst *insn, double value) { union { double d; @@ -1075,7 +1077,7 @@ brw_inst_set_imm_df(const struct intel_device_info *devinfo, static inline void brw_inst_set_imm_uq(const struct intel_device_info *devinfo, - brw_inst *insn, uint64_t value) + brw_eu_inst *insn, uint64_t value) { (void) devinfo; if (devinfo->ver >= 12) { @@ -1091,7 +1093,7 @@ brw_inst_set_imm_uq(const struct intel_device_info *devinfo, #define REG_TYPE(reg) \ static inline void \ brw_inst_set_##reg##_file_type(const struct intel_device_info *devinfo, \ - brw_inst *inst, enum brw_reg_file file, \ + brw_eu_inst *inst, enum brw_reg_file file, \ enum brw_reg_type type) \ { \ assert(file <= IMM); \ @@ -1102,7 +1104,7 @@ brw_inst_set_##reg##_file_type(const struct intel_device_info *devinfo, \ \ static inline enum brw_reg_type \ brw_inst_##reg##_type(const struct intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ unsigned file = __builtin_strcmp("dst", #reg) == 0 ? \ (unsigned) FIXED_GRF : \ @@ -1123,7 +1125,7 @@ REG_TYPE(src1) static inline void \ brw_inst_set_##reg##_ia1_addr_imm(const struct \ intel_device_info *devinfo, \ - brw_inst *inst, \ + brw_eu_inst *inst, \ unsigned value) \ { \ if (devinfo->ver >= 20) { \ @@ -1144,7 +1146,7 @@ brw_inst_set_##reg##_ia1_addr_imm(const struct \ } \ static inline unsigned \ brw_inst_##reg##_ia1_addr_imm(const struct intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ if (devinfo->ver >= 20) { \ return brw_inst_bits(inst, g20_high, g20_low) << 1 | \ @@ -1168,7 +1170,7 @@ BRW_IA1_ADDR_IMM(dst, 47, 56, 48, 59, 50, 59, 50, 33) static inline void \ brw_inst_set_##reg##_ia16_addr_imm(const struct \ intel_device_info *devinfo, \ - brw_inst *inst, unsigned value) \ + brw_eu_inst *inst, unsigned value) \ { \ assert(devinfo->ver < 12); \ assert((value & ~0x3ff) == 0); \ @@ -1178,7 +1180,7 @@ brw_inst_set_##reg##_ia16_addr_imm(const struct \ } \ static inline unsigned \ brw_inst_##reg##_ia16_addr_imm(const struct intel_device_info *devinfo, \ - const brw_inst *inst) \ + const brw_eu_inst *inst) \ { \ assert(devinfo->ver < 12); \ return (brw_inst_bits(inst, g9_high, g9_low) << 4) | \ @@ -1201,7 +1203,7 @@ BRW_IA16_ADDR_IMM(send_dst, 62, 56, 52) * Bits indices range from 0..127; fields may not cross 64-bit boundaries. */ static inline uint64_t -brw_inst_bits(const brw_inst *inst, unsigned high, unsigned low) +brw_inst_bits(const brw_eu_inst *inst, unsigned high, unsigned low) { assume(high < 128); assume(high >= low); @@ -1223,7 +1225,7 @@ brw_inst_bits(const brw_inst *inst, unsigned high, unsigned low) * Bits indices range from 0..127; fields may not cross 64-bit boundaries. */ static inline void -brw_inst_set_bits(brw_inst *inst, unsigned high, unsigned low, uint64_t value) +brw_inst_set_bits(brw_eu_inst *inst, unsigned high, unsigned low, uint64_t value) { assume(high < 128); assume(high >= low); @@ -1383,15 +1385,15 @@ F(src0_reg_nr, /* 9+ */ 55, 48, /* 12+ */ 47, 40) F20(dst_reg_nr, /* 9+ */ 47, 40, /* 12+ */ 23, 16, /* 20+ */ 39, 32) F(src1_index, /* 9+ */ 39, 35, /* 12+ */ 55, 52) F20(src0_index, /* 9+ */ 34, 30, /* 12+ */ 51, 48, /* 20+ */ 25, 23) -F(cmpt_control, /* 9+ */ 29, 29, /* 12+ */ 29, 29) /* Same location as brw_inst */ -F(cond_modifier, /* 9+ */ 27, 24, /* 12+ */ -1, -1) /* Same location as brw_inst */ +F(cmpt_control, /* 9+ */ 29, 29, /* 12+ */ 29, 29) /* Same location as brw_eu_inst */ +F(cond_modifier, /* 9+ */ 27, 24, /* 12+ */ -1, -1) /* Same location as brw_eu_inst */ F(acc_wr_control, /* 9+ */ 23, 23, /* 12+ */ -1, -1) F20(subreg_index, /* 9+ */ 22, 18, /* 12+ */ 39, 35, /* 20+ */ 51, 48) FD20(datatype_index, /* 9+ */ 17, 13, /* 12+ */ 34, 30, /* 20+ */ 28, 26, 31, 30) F20(control_index, /* 9+ */ 12, 8, /* 12+ */ 28, 24, /* 20+ */ 22, 18) F20(swsb, /* 9+ */ -1, -1, /* 12+ */ 15, 8, /* 20+ */ 17, 8) F(debug_control, /* 9+ */ 7, 7, /* 12+ */ 7, 7) -F(hw_opcode, /* 9+ */ 6, 0, /* 12+ */ 6, 0) /* Same location as brw_inst */ +F(hw_opcode, /* 9+ */ 6, 0, /* 12+ */ 6, 0) /* Same location as brw_eu_inst */ static inline unsigned brw_compact_inst_imm(const struct intel_device_info *devinfo, @@ -1435,14 +1437,14 @@ F(3src_hw_opcode, /* 9+ */ 6, 0, /* 12+ */ 6, 0) static inline void brw_inst_set_opcode(const struct brw_isa_info *isa, - struct brw_inst *inst, enum opcode opcode) + struct brw_eu_inst *inst, enum opcode opcode) { brw_inst_set_hw_opcode(isa->devinfo, inst, brw_opcode_encode(isa, opcode)); } static inline enum opcode brw_inst_opcode(const struct brw_isa_info *isa, - const struct brw_inst *inst) + const struct brw_eu_inst *inst) { return brw_opcode_decode(isa, brw_inst_hw_opcode(isa->devinfo, inst)); } diff --git a/src/intel/compiler/brw_eu_validate.c b/src/intel/compiler/brw_eu_validate.c index 5d33fdf360d..78d293c92ed 100644 --- a/src/intel/compiler/brw_eu_validate.c +++ b/src/intel/compiler/brw_eu_validate.c @@ -53,7 +53,7 @@ enum brw_hw_instr_format { }; typedef struct brw_hw_decoded_inst { - const brw_inst *raw; + const brw_eu_inst *raw; enum brw_hw_instr_format format; @@ -381,7 +381,7 @@ send_restrictions(const struct brw_isa_info *isa, static bool is_unsupported_inst(const struct brw_isa_info *isa, - const brw_inst *inst) + const brw_eu_inst *inst) { return brw_inst_opcode(isa, inst) == BRW_OPCODE_ILLEGAL; } @@ -2434,7 +2434,7 @@ VSTRIDE_3SRC(unsigned vstride) static struct string brw_hw_decode_inst(const struct brw_isa_info *isa, brw_hw_decoded_inst *inst, - const brw_inst *raw) + const brw_eu_inst *raw) { const struct intel_device_info *devinfo = isa->devinfo; struct string error_msg = { .str = NULL, .len = 0 }; @@ -2771,7 +2771,7 @@ brw_hw_decode_inst(const struct brw_isa_info *isa, bool brw_validate_instruction(const struct brw_isa_info *isa, - const brw_inst *inst, int offset, + const brw_eu_inst *inst, int offset, unsigned inst_size, struct disasm_info *disasm) { @@ -2830,11 +2830,11 @@ brw_validate_instructions(const struct brw_isa_info *isa, bool valid = true; for (int src_offset = start_offset; src_offset < end_offset;) { - const brw_inst *inst = assembly + src_offset; + const brw_eu_inst *inst = assembly + src_offset; bool is_compact = brw_inst_cmpt_control(devinfo, inst); unsigned inst_size = is_compact ? sizeof(brw_compact_inst) - : sizeof(brw_inst); - brw_inst uncompacted; + : sizeof(brw_eu_inst); + brw_eu_inst uncompacted; if (is_compact) { brw_compact_inst *compacted = (void *)inst; diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp index 547b4129823..4ea1e2b5ddf 100644 --- a/src/intel/compiler/brw_fs_generator.cpp +++ b/src/intel/compiler/brw_fs_generator.cpp @@ -139,14 +139,14 @@ fs_generator::patch_halt_jumps() * included GPU hangs and sparkly rendering on the piglit discard * tests. */ - brw_inst *last_halt = brw_HALT(p); + brw_eu_inst *last_halt = brw_HALT(p); brw_inst_set_uip(p->devinfo, last_halt, 1 * scale); brw_inst_set_jip(p->devinfo, last_halt, 1 * scale); int ip = p->nr_insn; foreach_in_list(ip_record, patch_ip, &discard_halt_patches) { - brw_inst *patch = &p->store[patch_ip->ip]; + brw_eu_inst *patch = &p->store[patch_ip->ip]; assert(brw_inst_opcode(p->isa, patch) == BRW_OPCODE_HALT); /* HALT takes a half-instruction distance from the pre-incremented IP. */ @@ -241,7 +241,7 @@ fs_generator::generate_mov_indirect(fs_inst *inst, */ const bool use_dep_ctrl = !inst->predicate && inst->exec_size == dispatch_width; - brw_inst *insn; + brw_eu_inst *insn; /* The destination stride of an instruction (in bytes) must be greater * than or equal to the size of the rest of the instruction. Since the @@ -418,7 +418,7 @@ fs_generator::generate_shuffle(fs_inst *inst, */ const bool use_dep_ctrl = !inst->predicate && lower_width == dispatch_width; - brw_inst *insn; + brw_eu_inst *insn; /* Due to a hardware bug some platforms (particularly Gfx11+) seem * to require the address components of all channels to be valid @@ -507,7 +507,7 @@ fs_generator::generate_quad_swizzle(const fs_inst *inst, brw_set_default_exec_size(p, cvt(inst->exec_size / 4) - 1); for (unsigned c = 0; c < 4; c++) { - brw_inst *insn = brw_MOV( + brw_eu_inst *insn = brw_MOV( p, stride(suboffset(dst, c), 4 * inst->dst.stride, 1, 4 * inst->dst.stride), stride(suboffset(src, BRW_GET_SWZ(swiz, c)), 4, 1, 0)); @@ -712,7 +712,7 @@ fs_generator::generate_scratch_header(fs_inst *inst, dst.type = BRW_TYPE_UD; - brw_inst *insn = brw_MOV(p, dst, brw_imm_ud(0)); + brw_eu_inst *insn = brw_MOV(p, dst, brw_imm_ud(0)); if (devinfo->ver >= 12) brw_set_default_swsb(p, tgl_swsb_null()); else @@ -1372,7 +1372,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, !"conditional_mod, no_dd_check, or no_dd_clear set for IR " "emitting more than 1 instruction"); - brw_inst *last = &p->store[last_insn_offset / 16]; + brw_eu_inst *last = &p->store[last_insn_offset / 16]; if (inst->conditional_mod) brw_inst_set_cond_modifier(p->devinfo, last, inst->conditional_mod); @@ -1424,7 +1424,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width, char sha1buf[41]; if (unlikely(debug_flag || dump_shader_bin)) { - _mesa_sha1_compute(p->store + start_offset / sizeof(brw_inst), + _mesa_sha1_compute(p->store + start_offset / sizeof(brw_eu_inst), after_size, sha1); _mesa_sha1_format(sha1buf, sha1); } diff --git a/src/intel/compiler/brw_gram.y b/src/intel/compiler/brw_gram.y index 2802d42166b..c0547bd063a 100644 --- a/src/intel/compiler/brw_gram.y +++ b/src/intel/compiler/brw_gram.y @@ -350,7 +350,7 @@ add_label(struct brw_codegen *p, const char* label_name, enum instr_label_type t struct instoption instoption; struct msgdesc msgdesc; struct tgl_swsb depinfo; - brw_inst *instruction; + brw_eu_inst *instruction; } %token ABS diff --git a/src/intel/compiler/test_eu_compact.cpp b/src/intel/compiler/test_eu_compact.cpp index b08af840ea3..00ad11f93e9 100644 --- a/src/intel/compiler/test_eu_compact.cpp +++ b/src/intel/compiler/test_eu_compact.cpp @@ -55,13 +55,13 @@ get_compact_params_name(const testing::TestParamInfo p) } static bool -test_compact_instruction(struct brw_codegen *p, brw_inst src) +test_compact_instruction(struct brw_codegen *p, brw_eu_inst src) { brw_compact_inst dst; memset(&dst, 0xd0, sizeof(dst)); if (brw_try_compact_instruction(p->isa, &dst, &src)) { - brw_inst uncompacted; + brw_eu_inst uncompacted; brw_uncompact_instruction(p->isa, &uncompacted, &dst); if (memcmp(&uncompacted, &src, sizeof(src))) { @@ -91,7 +91,7 @@ test_compact_instruction(struct brw_codegen *p, brw_inst src) * become meaningless once fuzzing twiddles a related bit. */ static void -clear_pad_bits(const struct brw_isa_info *isa, brw_inst *inst) +clear_pad_bits(const struct brw_isa_info *isa, brw_eu_inst *inst) { const struct intel_device_info *devinfo = isa->devinfo; @@ -104,7 +104,7 @@ clear_pad_bits(const struct brw_isa_info *isa, brw_inst *inst) } static bool -skip_bit(const struct brw_isa_info *isa, brw_inst *src, int bit) +skip_bit(const struct brw_isa_info *isa, brw_eu_inst *src, int bit) { const struct intel_device_info *devinfo = isa->devinfo; @@ -143,14 +143,14 @@ skip_bit(const struct brw_isa_info *isa, brw_inst *src, int bit) } static bool -test_fuzz_compact_instruction(struct brw_codegen *p, brw_inst src) +test_fuzz_compact_instruction(struct brw_codegen *p, brw_eu_inst src) { for (int bit0 = 0; bit0 < 128; bit0++) { if (skip_bit(p->isa, &src, bit0)) continue; for (int bit1 = 0; bit1 < 128; bit1++) { - brw_inst instr = src; + brw_eu_inst instr = src; uint64_t *bits = instr.data; if (skip_bit(p->isa, &src, bit1)) @@ -161,7 +161,7 @@ test_fuzz_compact_instruction(struct brw_codegen *p, brw_inst src) clear_pad_bits(p->isa, &instr); - if (!brw_validate_instruction(p->isa, &instr, 0, sizeof(brw_inst), NULL)) + if (!brw_validate_instruction(p->isa, &instr, 0, sizeof(brw_eu_inst), NULL)) continue; if (!test_compact_instruction(p, instr)) { @@ -284,7 +284,7 @@ TEST_P(Instructions, f0_1_MOV_GRF_GRF) brw_push_insn_state(p); brw_set_default_predicate_control(p, BRW_PREDICATE_NORMAL); - brw_inst *mov = brw_MOV(p, g0, g2); + brw_eu_inst *mov = brw_MOV(p, g0, g2); brw_inst_set_flag_subreg_nr(p->devinfo, mov, 1); brw_pop_insn_state(p); } diff --git a/src/intel/compiler/test_eu_validate.cpp b/src/intel/compiler/test_eu_validate.cpp index 757d414ad89..0bf82b35e39 100644 --- a/src/intel/compiler/test_eu_validate.cpp +++ b/src/intel/compiler/test_eu_validate.cpp @@ -3150,7 +3150,7 @@ TEST_P(validation_test, dpas_sub_byte_precision) : BRW_EXECUTE_8); for (unsigned i = 0; i < ARRAY_SIZE(test_vectors); i++) { - brw_inst *inst = + brw_eu_inst *inst = brw_DPAS(p, BRW_SYSTOLIC_DEPTH_8, 8, @@ -3698,7 +3698,7 @@ TEST_P(validation_test, scalar_register_restrictions) break; case BRW_OPCODE_SEND: case BRW_OPCODE_SENDC: { - brw_inst *send = brw_next_insn(p, tests[i].opcode); + brw_eu_inst *send = brw_next_insn(p, tests[i].opcode); brw_set_dest(p, send, t.dst); brw_set_src0(p, send, t.src0); brw_set_src1(p, send, t.src1);