nv50: check grclass instead of chipset for 3D caps

This commit is contained in:
Christoph Bumiller 2011-03-03 12:31:35 +01:00
parent 7048ad62f8
commit 3bf92a281b
2 changed files with 4 additions and 6 deletions

View file

@ -59,7 +59,7 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen,
switch (format) {
case PIPE_FORMAT_Z16_UNORM:
if ((nouveau_screen(pscreen)->device->chipset & 0xf0) != 0xa0)
if (nv50_screen(pscreen)->tesla->grclass < NVA0_3D)
return FALSE;
break;
default:
@ -117,7 +117,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_INDEP_BLEND_ENABLE:
return 1;
case PIPE_CAP_INDEP_BLEND_FUNC:
return nv50_screen(pscreen)->base.device->chipset >= 0xa3;
return nv50_screen(pscreen)->tesla->grclass >= NVA3_3D;
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
return 1;

View file

@ -90,9 +90,7 @@ nv50_blend_state_create(struct pipe_context *pipe,
int i;
boolean emit_common_func = cso->rt[0].blend_enable;
const uint32_t chipset = nv50_context(pipe)->screen->base.device->chipset;
if (chipset >= 0xa3) {
if (nv50_context(pipe)->screen->tesla->grclass >= NVA3_3D) {
SB_BEGIN_3D(so, BLEND_INDEPENDENT, 1);
SB_DATA (so, cso->independent_blend_enable);
}
@ -107,7 +105,7 @@ nv50_blend_state_create(struct pipe_context *pipe,
emit_common_func = TRUE;
}
if (chipset >= 0xa3) {
if (nv50_context(pipe)->screen->tesla->grclass >= NVA3_3D) {
emit_common_func = FALSE;
for (i = 0; i < 8; ++i) {