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venus: allow renderer submissions on per-context virtgpu rings
For submissions to renderers that support multiple timelines, put them on the virtgpu fencing timeline (dma fence context) specified by the VkQueue's bound ring_idx. CPU-sync'd renderer submissions can be sent in the same manner by using ring_idx = 0. Signed-off-by: Ryan Neph <ryanneph@google.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19691>
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5 changed files with 20 additions and 17 deletions
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@ -86,20 +86,18 @@ struct vn_renderer_submit_batch {
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size_t cs_size;
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/*
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* Submit cs to the virtual sync queue identified by sync_queue_index. The
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* virtual queue is assumed to be associated with the physical VkQueue
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* identified by vk_queue_id. After the execution completes on the
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* VkQueue, the virtual sync queue is signaled.
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* Submit cs to the timeline identified by ring_idx. A timeline is
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* typically associated with a physical VkQueue and bound to the ring_idx
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* during VkQueue creation. After execution completes on the VkQueue, the
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* timeline sync point is signaled.
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*
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* sync_queue_index must be less than max_sync_queue_count.
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*
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* vk_queue_id specifies the object id of a VkQueue.
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*
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* When sync_queue_cpu is true, it specifies the special CPU sync queue,
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* and sync_queue_index/vk_queue_id are ignored. TODO revisit this later
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* ring_idx 0 is reserved for the context-specific CPU timeline. sync
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* points on the CPU timeline are signaled immediately after command
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* processing by the renderer.
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*/
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uint32_t sync_queue_index;
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bool sync_queue_cpu;
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uint32_t ring_idx;
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// TODO remove once vtest supports multiple timelines
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vn_object_id vk_queue_id;
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/* syncs to update when the virtual sync queue is signaled */
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@ -21,7 +21,7 @@ vn_renderer_submit_simple_sync(struct vn_renderer *renderer,
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&(const struct vn_renderer_submit_batch){
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.cs_data = cs_data,
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.cs_size = cs_size,
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.sync_queue_cpu = true,
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.ring_idx = 0, /* CPU ring */
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.syncs = &sync,
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.sync_values = &(const uint64_t){ 1 },
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.sync_count = 1,
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@ -27,6 +27,7 @@ vn_renderer_submit_simple(struct vn_renderer *renderer,
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&(const struct vn_renderer_submit_batch){
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.cs_data = cs_data,
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.cs_size = cs_size,
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.ring_idx = 0, /* CPU ring */
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},
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.batch_count = 1,
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};
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@ -509,6 +509,8 @@ sim_submit_alloc_gem_handles(struct vn_renderer_bo *const *bos,
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static int
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sim_submit(struct virtgpu *gpu, const struct vn_renderer_submit *submit)
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{
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const bool use_ring_idx = gpu->base.info.supports_multiple_timelines;
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/* TODO replace submit->bos by submit->gem_handles to avoid malloc/loop */
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uint32_t *gem_handles = NULL;
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if (submit->bo_count) {
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@ -523,11 +525,13 @@ sim_submit(struct virtgpu *gpu, const struct vn_renderer_submit *submit)
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const struct vn_renderer_submit_batch *batch = &submit->batches[i];
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struct drm_virtgpu_execbuffer args = {
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.flags = batch->sync_count ? VIRTGPU_EXECBUF_FENCE_FD_OUT : 0,
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.flags = (batch->sync_count ? VIRTGPU_EXECBUF_FENCE_FD_OUT : 0) |
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(use_ring_idx ? VIRTGPU_EXECBUF_RING_IDX : 0),
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.size = batch->cs_size,
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.command = (uintptr_t)batch->cs_data,
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.bo_handles = (uintptr_t)gem_handles,
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.num_bo_handles = submit->bo_count,
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.ring_idx = (use_ring_idx ? batch->ring_idx : 0),
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};
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ret = drmIoctl(gpu->fd, DRM_IOCTL_VIRTGPU_EXECBUFFER, &args);
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@ -539,7 +543,7 @@ sim_submit(struct virtgpu *gpu, const struct vn_renderer_submit *submit)
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if (batch->sync_count) {
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ret = sim_submit_signal_syncs(gpu, args.fence_fd, batch->syncs,
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batch->sync_values, batch->sync_count,
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batch->sync_queue_cpu);
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batch->ring_idx == 0);
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close(args.fence_fd);
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if (ret)
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break;
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@ -540,9 +540,9 @@ vtest_vcmd_submit_cmd2(struct vtest *vtest,
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.sync_offset = sync_offset / sizeof(uint32_t),
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.sync_count = batch->sync_count,
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};
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if (!batch->sync_queue_cpu) {
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if (vtest->base.info.supports_multiple_timelines) {
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dst.flags = VCMD_SUBMIT_CMD2_FLAG_SYNC_QUEUE;
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dst.sync_queue_index = batch->sync_queue_index;
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dst.sync_queue_index = batch->ring_idx;
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dst.sync_queue_id = batch->vk_queue_id;
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}
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vtest_write(vtest, &dst, sizeof(dst));
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