fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-25 00:00:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

i965: Use greater-equal cmod to implement maximum.

Browse source 
The docs specifically call out SEL with .l and .ge as the
implementations of MIN and MAX respectively. Among other things, SEL
with these conditional mods are commutative.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
This commit is contained in:
Matt Turner 2015-02-09 21:11:46 -08:00
parent f8b435ae6a
commit 3b7f683f3b
4 changed files with 10 additions and 7 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
View file

@ -321,6 +321,9 @@ void
fs_visitor::emit_minmax(enum brw_conditional_mod conditionalmod, const fs_reg &dst,
const fs_reg &src0, const fs_reg &src1)
{
assert(conditionalmod == BRW_CONDITIONAL_GE ||
conditionalmod == BRW_CONDITIONAL_L);
fs_inst *inst;
if (brw->gen >= 6) {
@ -1956,7 +1959,7 @@ fs_visitor::rescale_texcoord(fs_reg coordinate, int coord_components,
chan = offset(chan, i);
inst = emit(BRW_OPCODE_SEL, chan, chan, fs_reg(0.0f));
inst->conditional_mod = BRW_CONDITIONAL_G;
inst->conditional_mod = BRW_CONDITIONAL_GE;
/* Our parameter comes in as 1.0/width or 1.0/height,
* because that's what people normally want for doing

6
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
View file

@ -517,7 +517,7 @@ vec4_visitor::emit_unpack_snorm_4x8(const dst_reg &dst, src_reg src0)
emit(MUL(scaled, src_reg(f), src_reg(1.0f / 127.0f)));
dst_reg max(this, glsl_type::vec4_type);
emit_minmax(BRW_CONDITIONAL_G, max, src_reg(scaled), src_reg(-1.0f));
emit_minmax(BRW_CONDITIONAL_GE, max, src_reg(scaled), src_reg(-1.0f));
emit_minmax(BRW_CONDITIONAL_L, dst, src_reg(max), src_reg(1.0f));
}
@ -545,7 +545,7 @@ void
vec4_visitor::emit_pack_snorm_4x8(const dst_reg &dst, const src_reg &src0)
{
dst_reg max(this, glsl_type::vec4_type);
emit_minmax(BRW_CONDITIONAL_G, max, src0, src_reg(-1.0f));
emit_minmax(BRW_CONDITIONAL_GE, max, src0, src_reg(-1.0f));
dst_reg min(this, glsl_type::vec4_type);
emit_minmax(BRW_CONDITIONAL_L, min, src_reg(max), src_reg(1.0f));
@ -1683,7 +1683,7 @@ vec4_visitor::visit(ir_expression *ir)
emit_minmax(BRW_CONDITIONAL_L, result_dst, op[0], op[1]);
break;
case ir_binop_max:
emit_minmax(BRW_CONDITIONAL_G, result_dst, op[0], op[1]);
emit_minmax(BRW_CONDITIONAL_GE, result_dst, op[0], op[1]);
break;
case ir_binop_pow:

4
src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
View file

@ -226,7 +226,7 @@ vec4_vs_visitor::emit_program_code()
/* if (tmp.y < 0) tmp.y = 0; */
src_reg tmp_y = swizzle(src[0], BRW_SWIZZLE_YYYY);
result.writemask = WRITEMASK_Z;
emit_minmax(BRW_CONDITIONAL_G, result, tmp_y, src_reg(0.0f));
emit_minmax(BRW_CONDITIONAL_GE, result, tmp_y, src_reg(0.0f));
src_reg clamped_y(result);
clamped_y.swizzle = BRW_SWIZZLE_ZZZZ;
@ -313,7 +313,7 @@ vec4_vs_visitor::emit_program_code()
}
case OPCODE_MAX:
emit_minmax(BRW_CONDITIONAL_G, dst, src[0], src[1]);
emit_minmax(BRW_CONDITIONAL_GE, dst, src[0], src[1]);
break;
case OPCODE_MIN:

2
src/mesa/drivers/dri/i965/brw_vec4_vs_visitor.cpp
View file

@ -97,7 +97,7 @@ vec4_vs_visitor::emit_prolog()
dst.type = brw_type_for_base_type(glsl_type::vec4_type);
emit(MOV(dst, src_reg(reg_d)));
emit(MUL(dst, src_reg(dst), src_reg(es3_normalize_factor)));
emit_minmax(BRW_CONDITIONAL_G, dst, src_reg(dst), src_reg(-1.0f));
emit_minmax(BRW_CONDITIONAL_GE, dst, src_reg(dst), src_reg(-1.0f));
} else {
/* The following equations are from the OpenGL 3.2 specification:
*