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gallivm: Allow indirection from TEMP registers too.

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The ADDR file is cumbersome for native integer capable drivers.  We
should consider deprecating it eventually, but this just adds support
for indirection from TEMP registers.

Reviewed-by: Brian Paul <brianp@vmware.com>
This commit is contained in:
José Fonseca 2012-12-04 16:54:41 +00:00
parent 1d35f77228
commit 3b7ce72625
1 changed files with 18 additions and 3 deletions
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21
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
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@ -533,9 +533,24 @@ get_indirect_index(struct lp_build_tgsi_soa_context *bld,
base = lp_build_const_int_vec(bld->bld_base.base.gallivm, uint_bld->type, reg_index);
assert(swizzle < 4);
rel = LLVMBuildLoad(builder,
bld->addr[indirect_reg->Index][swizzle],
"load addr reg");
switch (indirect_reg->File) {
case TGSI_FILE_ADDRESS:
rel = LLVMBuildLoad(builder,
bld->addr[indirect_reg->Index][swizzle],
"load addr reg");
/* ADDR LLVM values already have LLVM integer type. */
break;
case TGSI_FILE_TEMPORARY:
rel = lp_get_temp_ptr_soa(bld, indirect_reg->Index, swizzle);
rel = LLVMBuildLoad(builder, rel, "load temp reg");
/* TEMP LLVM values always have LLVM float type, but for indirection, the
* value actually stored is expected to be an integer */
rel = LLVMBuildBitCast(builder, rel, uint_bld->vec_type, "");
break;
default:
assert(0);
rel = uint_bld->zero;
}
index = lp_build_add(uint_bld, base, rel);